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MB90F352 参数 Datasheet PDF下载

MB90F352图片预览
型号: MB90F352
PDF下载: 下载PDF文件 查看货源
内容描述: 16位微控制器专有 [16-bit Proprietary Microcontroller]
分类和应用: 微控制器
文件页数/大小: 64 页 / 760 K
品牌: FUJITSU [ FUJITSU COMPONENT LIMITED. ]
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MB90350 Series
Pin No.
LQFP64*
Pin name
P17
Circuit
type
Function
General purpose I/O port. The register can be set to select whether to use
a pull-up resistor. This function is enabled in single-chip mode.
Input/output pin for external bus address data bus bit 15.
This function is enabled when external bus is enabled.
General purpose I/O ports. The register can be set to select whether to use
a pull-up resistor. In external bus mode, the pin is enabled as a general-
purpose I/O port when the corresponding bit in the external address output
control register (HACR) is 1.
39
AD15
G
P20 to P23
40 to 43
A16 to A19
PPG9, PPGB,
PPGD, PPGF
P24
44
A20
IN0
P25
G
G
Output pins for A16 to A19 of the external address bus.
When the corresponding bit in the external address output control register
(HACR) is 0, the pins are enabled as high address output pins A16 to A19.
Output pins for PPGs.
General purpose I/O port. The register can be set to select whether to use
a pull-up resistor. In external bus mode, the pin is enabled as a general-
purpose I/O port when the corresponding bit in the external address output
control register (HACR) is 1.
Output pins for A20 of the external address bus. When the corresponding
bit in the external address output control register (HACR) is 0, the pin is
enabled as high address output pins A20.
Data sample input pin for input capture ICU0.
General purpose I/O port. The register can be set to select whether to use
a pull-up resistor. In external bus mode, the pin is enabled as a general-
purpose I/O port when the corresponding bit in the external address output
control register (HACR) is 1.
51
A21
IN1
ADTG
P44
52
SDA0
FRCK0
P45
53
SCL0
FRCK1
P30
54
ALE
IN4
G
Output pin for A21 of the external address bus. When the corresponding bit
in the external address output control register (HACR) is 0, the pin is en-
abled as high address output pin A21.
Data sample input pin for input capture ICU1.
Trigger input pin for A/D converter.
General purpose I/O port
H
Serial data I/O pin for I
2
C 0
Input pin for the 16-bit I/O Timer 0
General purpose I/O port.
H
Serial clock I/O pin for I
2
C 0
Input for the 16-bit I/O Timer 1
General purpose I/O port. The register can be set to select whether to use
a pull-up resistor. This function is enabled in single-chip mode.
G
Address latch enable output pin. This function is enabled when external bus
is enabled.
Data sample input pin for input capture ICU4.
(Continued)
9