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MBM29F800TA-90PFTR 参数 Datasheet PDF下载

MBM29F800TA-90PFTR图片预览
型号: MBM29F800TA-90PFTR
PDF下载: 下载PDF文件 查看货源
内容描述: 8M ( 1M ×8 / 512K ×16 )位 [8M (1M X 8/512K X 16) BIT]
分类和应用: 闪存存储内存集成电路光电二极管
文件页数/大小: 48 页 / 516 K
品牌: FUJITSU [ FUJITSU COMPONENT LIMITED. ]
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MBM29F800TA
-55/-70/-90
/MBM29F800BA
-55/-70/-90
s
FUNCTIONAL DESCRIPTION
Read Mode
The MBM29F800TA/BA has two control functions which must be satisfied in order to obtain data at the outputs.
CE is the power control and should be used for a device selection. OE is the output control and should be used
to gate data to the output pins if a device is selected.
Address access time (t
ACC
) is equal to the delay from stable addresses to valid output data. The chip enable
access time (t
CE
) is the delay from stable addresses and stable CE to valid data at the output pins. The output
enable access time is the delay from the falling edge of OE to valid data at the output pins (Assuming the
addresses have been stable for at least t
ACC
- t
CE
time).
Standby Mode
There are two ways to implement the standby mode on the MBM29F800TA/BA devices, one using both the CE
and RESET pins; the other via the RESET pin only.
When using both pins, a CMOS standby mode is achieved with CE and RESET inputs both held at V
CC
± 0.3 V.
Under this condition the current consumed is less than 5
µA.
A TTL standby mode is achieved with CE and
RESET pins held at V
IH
. Under this condition the current is reduced to approximately 1mA. During Embedded
Algorithm operation, V
CC
Active current (I
CC2
) is required even CE = V
IH
. The device can be read with standard
access time (t
CE
) from either of these standby modes.
When using the RESET pin only, a CMOS standby mode is achieved with RESET input held at V
SS
± 0.3 V
(CE = “H” or “L”). Under this condition the current is consumed is less than 5
µA.
A TTL standby mode is achieved
with RESET pin held at V
IL
, (CE= “H” or “L”). Under this condition the current required is reduced to approximately
1mA. Once the RESET pin is taken high, the device requires 500 ns of wake up time before outputs are valid
for read access.
In the standby mode the outputs are in the high impedance state, independent of the OE input.
Output Disable
With the OE input at a logic high level (V
IH
), output from the device is disabled. This will cause the output pins
to be in a high impedance state.
Autoselect
The autoselect mode allows the reading out of a binary code from the device and will identify its manufacturer
and type. This mode is intended for use by programming equipment for the purpose of automatically matching
the devices to be programmed with its corresponding programming algorithm. This mode is functional over the
entire temperature range of the device.
To activate this mode, the programming equipment must force V
ID
(11.5 V to 12.5 V) on address pin A
9
. Two
identifier bytes may then be sequenced from the devices outputs by toggling address A
0
from V
IL
to V
IH
. All
addresses are don't cares except A
0
, A
1
, A
6
, and A
-1
(See Tables 4.1).
The manufacturer and device codes may also be read via the command register, for instances when the
MBM29F800TA/BA is erased or programmed in a system without access to high voltage on the A
9
pin. The
command sequence is illustrated in Table 7 (refer to Autoselect Command section).
Byte 0 (A
0
= V
IL
) represents the manufacturer’s code (Fujitsu = 04H) and A
0
= V
IH
represents the device identifier
code (MBM29F800TA = D6H and MBM29F800BA = 58H for
×8
mode; MBM29F800TA = 22D6H and
MBM29F800BA = 2258H for
×16
mode). These two bytes/words are given in the tables 4.1 and 4.2. All identifiers
for manufacturers and device will exhibit odd parity with DQ
7
defined as the parity bit. In order to read the proper
device codes when executing the autoselect, A
1
must be V
IL
(See Tables 4.1 and 4.2).
10