GL824/GL824C USB 2.0 On-The-Go Controller
I
EXTRST_
RXD
63
External reset
(pd)
B
(pu)
O
(pu)
O
(pu)
B
196
197
202
203
UART receives data input
UART transmits data output
I2C bus clock
TXD
I2CK
I2CD
I2C data
(pu)
VSEL
VBAT
206
207
I
I
Key voltage detection input
Battery voltage detection input
ATA/ATAPI Interface
Pin Name
CS0_
Pin#
65
Type
O
Description
PESETZ (PCVS2Z)
PESETZ (PCVS1Z)
Address 0~2
CS1_
86
O
DA0~2
67,71,69
O
I
AINTRQ
DMACK_
AIORDY
80
81
82
IREQZ
(pd)
O
DMACK
I
IORDY (WAITZ)
(pu)
DIOR_
DIOW_
83
84
O
O
I/O read strobe
I/O write strobe
I
DMARQ
85
DMARQ
(pd)
90,94,98,102,
108,112,116,
120,118,114,
110,106,100,
96,92,88
B
(pd)
DD0~15
Data 0~15
ARESET
ARESET_
122
O
SDRAM/Host Interface
Pin Name
Pin#
Type
Description
133,131,129,
130,132,134,
135,138,140,
137,144,146
SA1~12
O
SDRAM_A1~A12
O/I
(pd)
SA0/A0
136
142
SDRAM_A0 / share pin with A0 pin of HOST interface
SDRAM_BA0 / share pin with write status pin of HOST
interface
BA0/WSTS
SDRAM_BA1 / share pin with read status pin of HOST
interface
BA1/RSTS
CKE
139
148
150
O
O
SDRAM_CKE
O/I
SDRAM_RAS / share pin with read enable pin of HOST
(pu) interface
RAS_/RE_
©2000-2006 Genesys Logic Inc. - All rights reserved.
Page 17