GL850A USB 2.0 Low-Power HUB Controller
CHAPTER 2 FEATURES
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Compliant to
USB specification Revision 2.0
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4 downstream ports
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Upstream port supports both high-speed (HS) and full-speed (FS) traffic
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Downstream ports support HS, FS, and low-speed (LS) traffic
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1 control pipe (endpoint 0, 64-byte data payload) and 1 interrupt pipe (endpoint 1, 1-byte data payload)
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Backward compatible to
USB specification Revision 1.1
On-chip 8-bit micro-processor
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RISC-like architecture
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USB optimized instruction set
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Dual cycle instruction execution
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Performance: 6 MIPS @ 12MHz
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With 64-byte RAM and 2K internal ROM
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Support customized PID, VID by reading external EEPROM
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Support downstream port configuration by reading external EEPROM
Single Transaction Translator (STT)
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Single TT shares the same TT control logics for all downstream port devices. This is the most cost
effective solution for TT. Multiple TT provides individual TT control logics for each downstream port.
This is a performance better choice for USB 2.0 hub. Please refer to GL852 datasheet for more
detailed information.
Each downstream port supports two-color status indicator, with automatic and manual modes compliant to
USB specification Revision 2.0
Support both individual and gang modes of power management and over-current detection for
downstream ports (64-pin LQFP)
Support gang mode of power management and over-current detection for downstream ports
Conform to bus power requirements
Automatic switching between self-powered and bus-powered modes
Integrate USB 2.0 transceiver
PLL embedded with external 12 MHz crystal
Operate on 3.3 Volts
Embed serial resister for USB signals and integrate pull-up resister for upstream USB signal
Improve output drivers with slew-rate control for EMI reduction
Internal power-fail detection for ESD recovery
64/48-pin LQFP package
Applications:
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Stand-alone USB hub
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PC motherboard USB hub, Docking of notebook
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Any compound device to support USB HUB function
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