GL9701 PCI ExpressTM to PCI Bridge
6.38 OFFSET 98H: POWER MANAGEMENT CONTROL AND STATUS
REGISTER.................................................................................................... 54
6.39 OFFSET A0H: SLOT NUMBERING CAPABILITIES ID REGISTER ............ 54
6.40 OFFSET A1H: SLOT NUMBERING POINTER TO NEXT ID REGISTER ..... 55
6.41 OFFSET A2H: SLOT NUMBERING EXPANSION SLOT REGISTER............ 55
6.42 OFFSET A3H: SLOT NUMBERING CHASSIS NUMBER REGISTER ........... 55
6.43 OFFSET 100H: ADVANCED ERROR REPORTING ENHANCED
CAPABILITY HEADER REGISTER................................................................. 55
6.44 OFFSET 104H: UNCORRECTABLE ERROR STATUS REGISTER.............. 56
6.45 OFFSET 108H: UNCORRECTABLE ERROR MASK REGISTER ................ 56
6.46 OFFSET 10CH: UNCORRECTABLE ERROR SEVERITY REGISTER.......... 57
6.47 OFFSET 110H: CORRECTABLE ERROR STATUS REGISTER................... 57
6.48 OFFSET 114H: CORRECTABLE ERROR MASK REGISTER..................... 57
6.49 OFFSET 118H: ADVANCED ERROR CAPABILITIES AND CONTROL
REGISTER.................................................................................................... 58
6.50 OFFSET 11CH: HEADER LOG REGISTER .............................................. 58
6.51 OFFSET 12CH: SECONDARY UNCORRECTABLE ERROR STATUS
REGISTER.................................................................................................... 58
6.52 OFFSET 130H: SECONDARY UNCORRECTABLE ERROR MASK
REGISTER.................................................................................................... 59
6.53 OFFSET 134H: SECONDARY UNCORRECTABLE ERROR SEVERITY
REGISTER.................................................................................................... 60
6.54 OFFSET 138H: SECONDARY ERROR CAPABILITIES AND CONTROL
REGISTER.................................................................................................... 60
6.55 OFFSET 13CH: SECONDARY HEADER LOG REGISTER ......................... 61
6.56 OFFSET 150H: DEVICE SERIAL NUMBER ENHANCED CAPABILITY
HEADER REGISTER...................................................................................... 61
6.57 OFFSET 154H: DEVICE SERIAL NUMBER REGISTER ............................ 61
CHAPTER 7 ELECTRICAL CHARACTERISTICS ................................ 62
7.1 OPERATION CONDITIONS....................................................................... 62
7.3 DIFFERENTIAL RECEIVER (RX) INPUT SPECIFICATION......................... 68
7.4 PCI INTERFACE DC SPECIFICATIONS ................................................... 70
7.5 PCI INTERFACE AC SPECIFICATIONS ................................................... 71
7.6 CLOCK AND RESET SPECIFICATIONS ..................................................... 72
CHAPTER 8 PACKAGE DIMENSION...................................................... 74
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