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GP521 参数 Datasheet PDF下载

GP521图片预览
型号: GP521
PDF下载: 下载PDF文件 查看货源
内容描述: 通用控制器/存储器芯片的西门子听力仪器 [General Purpose Controller / Memory Chip for Hearing Instruments]
分类和应用: 存储消费电路商用集成电路控制器
文件页数/大小: 8 页 / 161 K
品牌: GENNUM [ GENNUM CORPORATION ]
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PIN DESCRIPTION
CLOCK - The clock pulses for synchronization of the data
transfer. The clock pulses are provided by the programming
unit.
DATA - The input / output pin allow for serial data transfer
between the GP521 and the programming unit.
V
CC
- Recommended supply voltage for GP521 is 1.3V
Similarly if OS1 is high,
I
O2
and
I
O4
are set as high impedance
points. This allows PCS
I
O1
and
I
O3
to sink current.
TABLE 1 EFFECTS OF SWOFF AND OS1 INPUTS
SWOFF OS1
OUTPUT
PCS Register Address
0
0
1
0
x
x
x
x
x
x
x
x
(
I
O1
and
I
O3
)*
(
I
O2
and
I
O4
)*
I
O1
I
O2
I
O3
I
O4
I
O5
I
O6
I
O7
I
O8
(0001000 and 0001010)
(0001001 and 0001011)
0001000
0001001
0001010
0001011
0001100
0001101
0001110
0001110
SWOFF - The logic state of SWOFF determines whether the
GP521 operates at 6 or 8 PCS configuration. When SWOFF is
I
O8
) PCS are available (8 PCS
high, all eight (I
O1
to
configuration) Figure 10.
1
1
1
1
x
CLOCK
DATA
V
CC
SWOFF
GND
OS1
I
o4
I
o3
1
2
3
4
5
17
16
15
14
I
R
NC
I
o5
NC
I
o6
I
o7
I
o8
I
o1
I
o2
x
x
x
Note*
GP521
13
12
6
7
8
11
10
9
The complementary outputs are set as high
impedance points.
Fig.10 EIGHT OUTPUT CONFIGURATION
When SWOFF is low, four PCS (I
O5
to
I
O8
) are available;
availablility of other two PCS is dependent on the voltage on
pin OS1. For this configuration (6 PCS configuration) the
necessary hardware connections are presented in Figure 11.
CLOCK
DATA
V
CC
SWOFF
GND
OSI
I
o4
I
o3
1
2
3
4
5
17
16
15
14
I
R
NC
I
o5
NC
I
o6
I
o7
I
o8
I
o1
I
o2
I
O1
-
I
O8
- Each pin is the output of the specific Programmable
Current Sink (PCS). Each PCS consists of four bit EEPROM
memory, Digital to Analog Converter (DAC) and current sink.
The EEPROM stores the four bit information written during
initialization of the system. Four bit memory allows for 16
settings of the current sink.
For simplicity, consider the
current sink as a variable resistor. The value of this resistor is
dependent on the DAC setting; DAC is controlled by the binary
value of the RAM memory. To define output current of the
current sink, it is necessary to set the voltage applied to the
PCS output. This voltage is recommended to be 0.5 V. If the
binary value of the EEPROM increases by one, the value of the
output current increases by 0.125 x
I
R
.
I
R
- The reference current delivered from the outside source
(eg. GP520A). This current determines the incremental value
of the programmable current sink for each increase of the
EEPROM address value. The valid addresses run from 0
through to 15.
Each step is defined as
∆I
= I
R
x 0.125,
therefore maximum current at setting 15 is equal to
I
15
=
I
R
x
0.125 x 15.
GP521
13
12
6
7
8
11
10
9
Fig. 11 SIX OUTPUT CONFIGURATION
OS1 - The voltage level on this pin determines the selection
of four PCS (I
O1
to
I
O4
) for 6 PCS configuration. As indicated
on Figure 11, pin
I
O1
,
I
O2
and
I
O3
,
I
O4
are connected together.
If OS1 is low,
I
O1
and
I
O3
are set to high impedance. Therefore
the PCS,
I
O2
and
I
O4
are permitted to sink current.
5
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