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GS4901BCNE3 参数 Datasheet PDF下载

GS4901BCNE3图片预览
型号: GS4901BCNE3
PDF下载: 下载PDF文件 查看货源
内容描述: SD时钟和定时发生器与同步锁相 [SD Clock and Timing Generator with GENLOCK]
分类和应用: 商用集成电路时钟
文件页数/大小: 95 页 / 1369 K
品牌: GENNUM [ GENNUM CORPORATION ]
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GS4901B/GS4900B Preliminary Data Sheet
In the case of interlaced output formats, the programmed vertical start and stop
lines refer to the start and stop lines of the generated USER signal on the odd
fields. The start and stop lines of the USER signal on the even fields will be V_Start
- 1 and V_Stop - 1, respectively.
For example, if VID_STD[5:0] = 3, the odd fields will have 263 lines and the even
fields will have 262 lines. A user-defined vertical pulse programmed to start on line
12 and stop on line 17 will start on frame lines 12 and 274, and stop on frame lines
17 and 279.
The designated registers for programming each user signal are located in the host
interface beginning at address 57h. See
H_Stop
H_Start
H_Start
H_Stop
AND=1
H_Stop
V_Start
V_Stop
V_Start
V_Stop
AND=0, OR=0, XOR=0 (default)
H_Start
H_Stop
V_Start
V_Stop
V_Start
V_Stop
AND=0, OR=1
AND=0, OR=0, XOR=1
Shading indicates when USER_x signal is active
Figure 3-9: USER Programmable Output Signal
37703 - 0
April 2006
H_Start
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