欢迎访问ic37.com |
会员登录 免费注册
发布采购

GS4901BCNE3 参数 Datasheet PDF下载

GS4901BCNE3图片预览
型号: GS4901BCNE3
PDF下载: 下载PDF文件 查看货源
内容描述: SD时钟和定时发生器与同步锁相 [SD Clock and Timing Generator with GENLOCK]
分类和应用: 商用集成电路时钟
文件页数/大小: 95 页 / 1369 K
品牌: GENNUM [ GENNUM CORPORATION ]
 浏览型号GS4901BCNE3的Datasheet PDF文件第84页浏览型号GS4901BCNE3的Datasheet PDF文件第85页浏览型号GS4901BCNE3的Datasheet PDF文件第86页浏览型号GS4901BCNE3的Datasheet PDF文件第87页浏览型号GS4901BCNE3的Datasheet PDF文件第89页浏览型号GS4901BCNE3的Datasheet PDF文件第90页浏览型号GS4901BCNE3的Datasheet PDF文件第91页浏览型号GS4901BCNE3的Datasheet PDF文件第92页  
GS4901B/GS4900B Preliminary Data Sheet
Application HOST
GS4911B/GS4910B
CS_TMS
SCLK_TCLK
SDIN_TDI
SDOUT_TDO
Tri-State
In-circuit ATE probe
JTAG/HOST
Figure 3-17: System JTAG
3.12 Device Power-Up
3.12.1 Power Supply Sequencing
The GS4901B/GS4900B has a recommended power supply sequence. To ensure
correct power-up, the ANALOG_VDD and CORE_VDD power pins should be
powered before IO_VDD.
Device pins may be driven prior to power-up without causing damage.
3.13 Device Reset
In order to initialize operating conditions to their default states, the application layer
must hold the RESET signal LOW during power up and for a minimum of 500us
after the last supply has reached its operating voltage.
37703 - 0
April 2006
88 of 95