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HDD32M72D18RPW 参数 Datasheet PDF下载

HDD32M72D18RPW图片预览
型号: HDD32M72D18RPW
PDF下载: 下载PDF文件 查看货源
内容描述: DDR SDRAM模组256Mbyte ( 32Mx72bit )的基础上, 16Mx8 , 4Banks , 4K参考, 184PIN -DIMM与PLL和注册 [DDR SDRAM Module 256Mbyte (32Mx72bit), based on 16Mx8, 4Banks, 4K Ref., 184Pin-DIMM with PLL & Register]
分类和应用: 动态存储器双倍数据速率
文件页数/大小: 12 页 / 157 K
品牌: HANBIT [ HANBIT ELECTRONICS CO.,LTD ]
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HANBit
HDD32M72B18RPW
CAPACITANCE
(V
DD
= min to max, V
DDQ
= 2.5V to 2.7V, T
A
= 25°C, f = 100MHz)
DESCRIPTION
SYMBOL
C
IN1
C
IN2
C
IN3
C
IN4
C
IN5
C
OUT1
C
OUT2
MIN
-
-
-
-
-
-
-
MAX
12
12
11
12
16
16
16
UNITS
pF
pF
pF
pF
pF
pF
pF
Input capacitance(A0~A12, BA0~BA1, /RAS, /CAS,/WE)
Input capacitance(CKE0,CKE1)
Input capacitance(/CS0,/CS1)
Input capacitance(CK0~/CK1)
Input capacitance(DM0~DM8)
Data & DQS input/output capacitance (DQ0 ~ DQ63, DQS0~DQS8)
Data input/output capacitance (CB0~CB7))
DC CHARACTERISTICS
(RECOMMENDED OPERATING CONDITION UNLESS OTHERWISE NOTED, V
DD
= 2.5V, T =25°C)
Symbo
pARAMETER
l
Operating current
(One bank
active-Precharge)
Condition
t
RC
t
RC
(min), t
CK=100MHz
for DDR200,133MHz for
DDR266A & DDR266B
DQ,DM and DQS inputs changing twice per clock
cycle Address and control inputs changing once per
clock cycle
One bank open, BL=4,Reads-Refer to the following
page for detailed test condition
All banks idle, power-down mode
CKE
V
IL
(max), t
CK=100MHz
for DDR200,133MHz for
DDR266A & DDR266B
V
IN
= V
REF
for DQ,DQS and DM
/CS≥ V
IH
(min), All banks idle
CKE
V
IH
(min), t
CK=100MHz
for DDR200,133MHz for
DDR266A & DDR266B
Address and control inputs changing once per clock
cycle V
IN
= V
REF
for DQ,DQS and DM
/CS≥ V
IH
(min), All banks idle
CKE
V
IH
(min), t
CK=100MHz
for DDR200,133MHz for
DDR266A & DDR266B
Address and other control inputs stable with
keeping≥ V
IH
(min) or
V
IL
(max)
V
IN
= V
REF
for DQ,DQS and DM
One bank active; power-down mode;
CKE
V
IL
(max), t
CK=100MHz
for DDR200,133MHz for
DDR266A & DDR266B
V
IN
= V
REF
for DQ,DQS and DM.
CS# >= VIH(min), CKE>=VIH(min)
one bank active, active
precharge, tRC=tRASmax
tCK = 100Mhz for DDR200, 133Mhz for DDR266A
& DDR266B, DQ, DQS and DM inputs changing
twice per clock cycle Address and other control
inputs changing once per clock cycle
TEST
-10A
version
-13A
-13B
Unit
I
DD0
1299
1425
1425
mA
Operating current
(One bank Operation)
I
DD1
1479
1605
1605
mA
Precharge power-
Down standby current
I
DD2P
696
736.5
736.5
mA
Precharge Floating
standby current
I
DD2F
831
885
885
mA
Precharge Quiet
Standby current
I
DD2Q
786
822
822
Active power-down
Mode standby current
I
DD3P
939
975
975
mA
Active standby
I
DD3N
current
1038
1110
1110
mA
URL : www.hbe.co.kr
REV 1.0 (August.2002)
6
HANBit Electronics Co.,Ltd.