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HMD8M64D8A-13 参数 Datasheet PDF下载

HMD8M64D8A-13图片预览
型号: HMD8M64D8A-13
PDF下载: 下载PDF文件 查看货源
内容描述: 同步DRAM模块64Mbyte ( 8Mx64bit ) , DIMM , 4Banks , 4K参考, 3.3V [Synchronous DRAM Module 64Mbyte (8Mx64bit),DIMM, 4Banks, 4K Ref., 3.3V]
分类和应用: 动态存储器
文件页数/大小: 10 页 / 84 K
品牌: HANBIT [ HANBIT ELECTRONICS CO.,LTD ]
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HANBit
Active
standby
current
in
I
CC3
P
I
CC3
PS
CKE
V
IL
(max), t
CC
=10ns
CKE&CLK
V
IL
(max)
t
CC
=∞
CKE≥V
IH
(min),
CS*≥V
IH
(min),
Active standby current in
non power-down mode
(One bank active)
I
CC3
NS
I
CC3
N
t
CC
=10ns
25
3
3
HSD8M64D8A
mA
power-down mode
Input signals are changed
one time during 20ns
CKE≥VIH(min)
CLK
≤VIL(max),
t
CC
=∞
mA
15
Input signals are stable
I
O
= 0 mA
Operating current
(Burst mode)
I
CC4
Page burst
4Banks Activated
t
CCD
= 2CLKs
I
CC5
I
CC6
t
RC
t
RC
(min)
CKE
0.2V
135
130
1
400
Notes :
1. Measured with outputs open.
2. Refresh period is 64ms.
3. Unless otherwise noticed, input swing level is CMOS(V
IH
/V
IL
=V
DDQ
/V
SSQ
).
125
125
mA
mA
mA
2
115
110
95
95
mA
1
Refresh current
Self refresh current
AC OPERATING TEST CONDITIONS
(vcc = 3.3V
±
0.3V, TA = 0 to 70° C)
PARAMETER
AC Input levels (Vih/Vil)
Input timing measurement reference level
Input rise and fall time
Output timing measurement reference level
Output load condition
Value
2.4/0.4
1.4
tr/tf = 1/1
1.4
See Fig. 2
UNIT
V
V
Ns
V
+3.3V
V
tt
=1.4V
1200Ω
D
OUT
870Ω
50pF*
V
OH
(DC) = 2.4V, I
OH
= -2mA
V
OL
(DC) = 0.4V, I
OL
= 2mA
(Fig. 1) DC output load
D
OUT
Z0=50Ω
50Ω
50pF
(Fig. 2) AC output load circuit
URL : www.hbe.co.kr
REV.1.0(August.2002)
- 6
-
HANBit Electronics Co.,Ltd.