HANBit
HMS3224M3/Z3
TIMING DIAGRAMS
TIMING WAVEFORM OF READ CYCLE
( Address Controlled) ( /CE =/OE = V
IL
, /WE = V
IH
)
t
RC
Address
t
AA
t
OH
Data out
Previous Data Valid
Data Valid
TIMING WAVEFORM OF READ CYCLE
( /WE=V
IH
)
t
RC
Address
t
AA
/CE
t
LZ(4,5
)
/OE
t
OLZ
Data Out
Vcc Supply
Current
High-Z
Valid Data
l
CC
l
SB
t
PU
50%
t
PD
50%
t
OE
t
OH
t
CO
t
OHZ
t
HZ(3,4,5)
Notes
(Read Cycle)
1. /WE is high for read cycle.
2. All read cycle timing is referenced from the last valid address to the first transition address.
3. t
HZ
and t
OHZ
are defined as the time at which the outputs achieve the open circuit condition are not referenced to V
OH
or V
OL
levels.
4. At any given temperature and voltage condition, t
HZ
(max.) is less than t
LZ
(min.) both for a given device and from device
to device.
5. Transition is measured
±
200mV from steady state voltage with Load (B). This parameter is sampled and not 100%
tested.
6. Device is continuously selected with /CE = V
IL
.
7. Address valid prior to coincident with /CE transition low.
6
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HANBIT [ HANBIT ELECTRONICS CO.,LTD ]
