HMS51232Z4L-20 参数 Datasheet PDF下载

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TIMING DIAGRAMS

HMS51232M4L

TIMING WAVEFORM OF READ CYCLE

( Address Controlled) ( /CE = /OE = V

IL

, /WE = V

IH

)

t

RC

Address

t

AA

t

OH

Data out

Previous Data Valid

Data Valid

TIMING WAVEFORM OF READ CYCLE

(/WE = V

IH

)

t

RC

Address

t

AA

/CE

t

LZ(4

)

/OE

t

OLZ

Data Out

High-Z

Data Valid

t

HZ(3,4)

t

CO

t

OHZ

t

OE

t

OH

Notes

(Read Cycle)

1. /WE is high for read cycle.

2. All read cycle timing is referenced from the last valid address to first transition address.

3. t

HZ

and t

OHZ

are defined as the time at which the outputs achieve the open circuit condition and are not referenced to V

OH

or V

OL

levels.

4. At any given temperature and voltage condition, t

HZ

(max.) is less than t

LZ

(min.) both for a given device and from device

to device.

6

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