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HSD16M32F4V-10L 参数 Datasheet PDF下载

HSD16M32F4V-10L图片预览
型号: HSD16M32F4V-10L
PDF下载: 下载PDF文件 查看货源
内容描述: 基于16Mx8 , 4Banks , 4K参考同步DRAM模块64Mbyte ( 16M ×32位) SMM 。 , 3.3V [Synchronous DRAM Module 64Mbyte ( 16M x 32-Bit ) SMM based on 16Mx8, 4Banks, 4K Ref., 3.3V]
分类和应用: 动态存储器
文件页数/大小: 11 页 / 103 K
品牌: HANBIT [ HANBIT ELECTRONICS CO.,LTD ]
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HANBit
HSD16M32F4V/VA
AC CHARACTERISTICS
(AC operating conditions unless otherwise noted)
SYMB
PARAMETER
OL
CLK cycle time
CAS
7.5
latency=3
t
CC
CAS
-
latency=2
CLK to valid
output delay
CAS
5.4
latency=3
t
SAC
CAS
-
latency=2
Output data
hold time
CAS
2.7
latency=3
t
OH
CAS
-
latency=2
CLK high pulse width
CLK low pulse width
Input setup time
Input hold time
CLK to output in Low-Z
CLK to output
in Hi-Z
CAS
5.4
latency=3
t
SHZ
CAS
-
latency=2
Notes :
1. Parameters depend on programmed CAS latency.
2. If clock rising time is longer than 1ns, (tr/2-0.5)ns should be added to the parameter.
3. Assumed input rise and fall time (tr & tf) = 1ns.
If tr & tf is longer than 1ns, transient time compensation should be considered, ie., [(tr + tf)/2-1]ns should be added to
the parameter.
-
6
7
ns
6
6
6
ns
2
t
CH
t
CL
t
SS
t
SH
t
SLZ
2.5
2.5
1.5
0.8
1
3
3
2
1
1
3
3
2
1
1
3
3
2
1
1
ns
ns
ns
ns
ns
3
3
3
3
3
-
3
3
ns
2
3
3
3
-
6
7
ns
1,2
6
6
6
-
10
12
1000
1000
1000
1000
ns
1
8
10
10
MIN
MAX
MIN
MAX
MIN
MAX
MIN
MAX
-13
-12
-10
-10L
UNIT
NOTE
URL: www.hbe.co.kr
REV 1.0 (August.2002).
7
HANBit Electronics Co.,Ltd