HANBit
HSD32M64D16A
CKE ³ VIH(min)
ICC2NS
CLK £ VIL(max), tCC=¥
Input signals are stable
CKE £ VIL(max), tCC=10ns
112
Active standby
current in power-
down mode
ICC3P
80
80
mA
mA
ICC3PS
CKE&CLK £ VIL(max) tCC=¥
Active standby
current in
CKE³ VIH(min), CS*³ VIH(min)
tCC=10ns Input signals are
changed one time during 20ns
CKE³ VIH(min) CLK £VIL(max)
tCC=¥ Input signals are stable
IO = 0 mA Page burst
ICC3
N
480
320
non power-down
mode
ICC3NS
(One bank active)
Operating current
(Burst mode)
ICC4
4Banks Activated
2400
3520
2320 2000
2000
3360
mA
1
2
tCCD = 2CLKs
Refresh current
ICC5
ICC6
tRC ³ tRC(min)
3520
3360
mA
mA
mA
24
12.8
Self refresh current
CKE £ 0.2V
Notes:
1. Measured with outputs open.
2. Refresh period is 64ms.
3. Unless otherwise noticed, input swing level is CMOS(VIH/VIL=VDDQ/VSSQ).
AC OPERATING TEST CONDITIONS
(vcc = 3.3V ± 0.3V, TA = 0 to 70°C)
PARAMETER
Value
2.4/0.4
1.4
UNIT
AC Input levels (Vih/Vil)
V
Input timing measurement reference level
Input rise and fall time
V
tr/tf = 1/1
1.4
ns
V
Output timing measurement reference level
Output load condition
See Fig. 2
URL: www.hbe.co.kr
REV 1.0 (August.2002)
6
HANBit Electronics Co.,Ltd.