HANBit
CKE
≥
V
IH
(min)
I
CC2
NS
CLK
≤
V
IL
(max),
t
CC
=∞
6
HSD4M64B4
Input signals are stable
Active
standby
current
in
I
CC3
P
I
CC3
PS
CKE
≤
V
IL
(max), t
CC
=10ns
CKE&CLK
≤
V
IL
(max)
t
CC
=∞
CKE≥V
IH
(min),
I
CC3
N
CS*≥V
IH
(min),
t
CC
=10ns
20
mA
2
mA
2
power-down mode
Active standby current in
non power-down mode
(One bank active)
Input signals are changed
one time during 20ns
CKE≥VIH(min)
I
CC3
NS
CLK
≤VIL(max),
t
CC
=∞
10
Input signals are stable
I
O
= 0 mA
Operating current
(Burst mode)
I
CC4
Page burst
115
4Banks Activated
t
CCD
= 2CLKs
Refresh current
Self refresh current
Notes :
1. Measured with outputs open.
2. Refresh period is 64ms.
I
CC5
I
CC6
t
RC
≥
t
RC
(min)
CKE
≤
0.2V
90
1
450
90
85
mA
mA
uA
2
90
90
mA
1
AC OPERATING TEST CONDITIONS
(vcc = 3.3V
±
0.3V, TA = 0 to 70°C)
PARAMETER
AC Input levels (Vih/Vil)
Input timing measurement reference level
Input rise and fall time
Output timing measurement reference level
Output load condition
Value
2.4/0.4
1.4
tr/tf = 1/1
1.4
See Fig. 2
UNIT
V
V
ns
V
URL:www.hbe.co.kr
REV.1.0(August.2002)
HANBit Electronics Co.,Ltd.
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6
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