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HSD4M64B4-8 参数 Datasheet PDF下载

HSD4M64B4-8图片预览
型号: HSD4M64B4-8
PDF下载: 下载PDF文件 查看货源
内容描述: 同步DRAM模块32Mbyte ( 4Mx64位) , SO -DIMM , 4Banks , 4K参考, 3.3V [Synchronous DRAM Module 32Mbyte (4Mx64-Bit), SO-DIMM, 4Banks, 4K Ref., 3.3V]
分类和应用: 存储动态存储器
文件页数/大小: 11 页 / 87 K
品牌: HANBIT [ HANBIT ELECTRONICS CO.,LTD ]
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HANBit
AC CHARACTERISTICS
(AC operating conditions unless otherwise noted)
SYMBO
PARAMETER
L
CLK cycle time
CAS
8
latency=3
t
CC
CAS
-10
latency=2
CLK to valid
output delay
CAS
6
latency=3
t
SAC
CAS
-6
latency=2
Output data
hold time
CAS
3
latency=3
t
OH
CAS
-3
latency=2
CLK high pulse width
CLK low pulse width
Input setup time
Input hold time
CLK to output in Low-Z
CLK to output
in Hi-Z
CAS
6
latency=3
t
SHZ
CAS
-6
latency=2
7
7
6
6
t
CH
t
CL
t
SS
t
SH
t
SLZ
3
3
2
1
1
3.5
3.5
3.5
1
1
3
3
2
1
1
3
3
3
3
7
7
7
6
13
12
1000
1000
1000
10
10
MIN
MAX
MIN
MAX
MIN
MAX
-8
-10
-L
HSD4M64B4
UNIT
NOTE
ns
1
ns
1,2
ns
2
ns
ns
ns
ns
ns
ns
3
3
3
3
3
2
ns
Notes :
1. Parameters depend on programmed CAS latency.
2. If clock rising time is longer than 1ns, (tr/2-0.5)ns should be added to the parameter.
3. Assumed input rise and fall time (tr & tf) = 1ns.
If tr & tf is longer than 1ns, transient time compensation should be considered, ie., [(tr + tf)/2-1]ns should be added to
the parameter.
URL:www.hbe.co.kr
REV.1.0(August.2002)
HANBit Electronics Co.,Ltd.
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8
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