HT45RM03
Program Memory
-
ROM
The program memory is used to store the program in-
structions which are to be executed. It also contains
data, table, and interrupt entries, and is organized into
4096´15 bits, addressed by the program counter and ta-
ble pointer.
Certain locations in the program memory are reserved
for special usage:
·
Location 000H
0 0 0 H
0 0 4 H
0 0 8 H
0 0 C H
0 1 0 H
0 1 4 H
0 1 8 H
D e v ic e In itia liz a tio n P r o g r a m
C o m p a ra to r In te rru p t
E x te rn a l In te rru p t 0
E x te rn a l In te rru p t 1
P W M
P e r io d In te r r u p t
P ro g ra m
M e m o ry
T im e r /E v e n t C o u n te r 0 O v e r flo w
T im e r /E v e n t C o u n te r 1 O v e r flo w
These area is reserved for program initialization. After
chip reset, the program always begins execution at lo-
cation 000H.
·
Location 004H
n 0 0 H
n F F H
L o o k - u p T a b le ( 2 5 6 w o r d s )
These area is reserved for the Comparator interrupt
service program. If the Comparator output pin is acti-
vated, and if the interrupt is enable and the stack is not
full, the program begins execution at location 004H.
·
Location 008H
F F F H
L o o k - u p T a b le ( 2 5 6 w o r d s )
1 5 b its
N o te : n ra n g e s fro m
0 to F
These area is reserved for the external interrupt 0 ser-
vice program. If the INT0A, INT0B or INT0C input pin
is activated, the interrupt is enabled and the stack is
not full, the program begins execution at location
008H.
·
Location 00CH
Program Memory
·
Table location
These area is reserved for the external interrupt 1 ser-
vice program. If the INT1 input pin is activated, the in-
terrupt is enabled and the stack is not full, the program
begins execution at location 00CH.
·
Location 010H
These area is reserved for the PWM period interrupt
service program. If a PWM period interrupt results
from a PWM counter overflow, and if the interrupt is
enabled and the stack is not full, the program begins
execution at location 010H.
·
Location 014H
These area is reserved for the Timer/Event Counter 0
interrupt service program. If a timer interrupt results
from a Timer/Event Counter 0 overflow, and if the in-
terrupt is enabled and the stack is not full, the program
begins execution at location 014H.
·
Location 018H
These area is reserved for the Timer/Event Counter 1
interrupt service program. If a timer interrupt results
from a Timer/Event Counter 1 overflow, and if the in-
terrupt is enabled and the stack is not full, the program
begins execution at location 018H.
Any location in the PROM space can be used as
look-up tables. The instructions
²TABRDC
[m]² (the
current page, 1 page=256 words) and
²TABRDL
[m]²
(the last page) transfer the contents of the lower-order
byte to the specified data memory, and the
higher-order byte to TBLH (08H). Only the destination
of the lower-order byte in the table is well-defined, the
other bits of the table word are transferred to the lower
portion of TBLH, and the remaining 1 bit is read as
²0².
The Table Higher-order byte register (TBLH) is read
only. The table pointer (TBLP) is a read/write register
(07H), which indicates the table location. Before ac-
cessing the table, the location must be placed in
TBLP. The TBLH is read only and cannot be restored.
If the main routine and the ISR (Interrupt Service Rou-
tine) both employ the table read instruction, the con-
tents of the TBLH in the main routine are likely to be
changed by the table read instruction used in the ISR.
Errors can occur. In other words, using the table read
instruction in the main routine and the ISR simulta-
neously should be avoided. However, if the table read
instruction has to be applied in both the main routine
and the ISR, the interrupt is supposed to be disabled
prior to the table read instruction. It will not be enabled
until the TBLH has been backed up. All table related
instructions require two cycles to complete the opera-
tion. These areas may function as normal program
memory depending upon the requirements.
Table Location
Instruction
TABRDC [m]
TABRDL [m]
*11
P11
1
*10
P10
1
*9
P9
1
*8
P8
1
*7
@7
@7
*6
@6
@6
*5
@5
@5
*4
@4
@4
*3
@3
@3
*2
@2
@2
*1
@1
@1
*0
@0
@0
Table Location
Note:
*11~*0: Table location bits
@7~@0: Table pointer bits
7
P11~P8: Current program counter bits
Rev. 1.10
February 16, 2007
HOLTEK [ HOLTEK SEMICONDUCTOR INC ]
