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HT46R064B 参数 Datasheet PDF下载

HT46R064B图片预览
型号: HT46R064B
PDF下载: 下载PDF文件 查看货源
内容描述: 增强A / D型8位OTP MCU [Enhanced A/D Type 8-Bit OTP MCU]
分类和应用:
文件页数/大小: 96 页 / 533 K
品牌: HOLTEK [ HOLTEK SEMICONDUCTOR INC ]
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HT46R064B/065B/066B  
·
STATUS Register  
Bit  
7
6
5
TO  
R
4
PDF  
R
3
OV  
R/W  
x
2
Z
1
AC  
R/W  
x
0
Name  
R/W  
C
¾
¾
¾
¾
¾
¾
R/W  
x
R/W  
x
POR  
0
0
²x² unknown  
Bit 7, 6  
Unimplemented, read as ²0²  
TO: Watchdog Time-Out flag  
Bit 5  
Bit 4  
Bit 3  
0: After power up or executing the ²CLR WDT² or ²HALT² instruction  
1: A watchdog time-out occurred.  
PDF: Power down flag  
0: After power up or executing the ²CLR WDT² instruction  
1: By executing the ²HALT² instruction  
OV: Overflow flag  
0: no overflow  
1: an operation results in a carry into the highest-order bit but not a carry out of the  
highest-order bit or vice versa.  
Bit 2  
Bit 1  
Z: Zero flag  
0: The result of an arithmetic or logical operation is not zero  
1: The result of an arithmetic or logical operation is zero  
AC: Auxiliary flag  
0: no auxiliary carry  
1: an operation results in a carry out of the low nibbles in addition, or no borrow from the  
high nibble into the low nibble in subtraction  
Bit 0  
C: Carry flag  
0: no carry-out  
1: an operation results in a carry during an addition operation or if a borrow does not take place  
during a subtraction operation  
C is also affected by a rotate through carry instruction.  
Input/Output Ports and Control Registers  
high, for an output it must be set low. During program in-  
itialisation, it is important to first setup the control regis-  
ters to specify which pins are outputs and which are  
inputs before reading data from or writing data to the I/O  
ports. One flexible feature of these registers is the ability  
to directly program single bits using the ²SET [m].i² and  
²CLR [m].i² instructions. The ability to change I/O pins  
from output to input and vice versa by manipulating spe-  
cific bits of the I/O control registers during normal pro-  
gram operation is a useful feature of these devices.  
Within the area of Special Function Registers, the port  
PA, PB, etc data I/O registers and their associated con-  
trol register PAC, PBC, etc play a prominent role. These  
registers are mapped to specific addresses within the  
Data Memory as shown in the Data Memory table. The  
data I/O registers, are used to transfer the appropriate  
output or input data on the port. The control registers  
specifies which pins of the port are set as inputs and  
which are set as outputs. To setup a pin as an input, the  
corresponding bit of the control register must be set  
Rev. 1.00  
24  
April 8, 2011