HT48R10A-1/HT48C10-1
Certain locations in the program memory are reserved
for special usage:
·
Location 000H
This area is reserved for program initialization. After
chip reset, the program always begins execution at lo-
cation 000H.
·
Location 004H
This area is reserved for the external interrupt service
program. If the INT input pin is activated, the interrupt
is enabled and the stack is not full, the program begins
execution at location 004H.
·
Location 008H
This area is reserved for the timer/event counter inter-
rupt service program. If a timer interrupt results from a
timer/event counter overflow, and if the interrupt is en-
abled and the stack is not full, the program begins ex-
ecution at location 008H.
·
Table location
ferred to the lower portion of TBLH, and the remaining
2 bits are read as
²0².
The Table Higher-order byte
register (TBLH) is read only. The table pointer (TBLP)
is a read/write register (07H), which indicates the table
location. Before accessing the table, the location must
be placed in TBLP. The TBLH is read only and cannot
be restored. If the main routine and the ISR (Interrupt
Service Routine) both employ the table read instruc-
tion, the contents of the TBLH in the main routine are
likely to be changed by the table read instruction used
in the ISR. Errors can occur. In other words, using the
table read instruction in the main routine and the ISR
simultaneously should be avoided. However, if the ta-
ble read instruction has to be applied in both the main
routine and the ISR, the interrupt is supposed to be
disabled prior to the table read instruction. It will not be
enabled until the TBLH has been backed up. All table
related instructions require two cycles to complete the
operation. These areas may function as normal pro-
gram memory depending upon the requirements.
Stack Register
-
STACK
This is a special part of the memory which is used to
save the contents of the program counter only. The
stack is organized into 4 levels and is neither part of the
data nor part of the program space, and is neither read-
able nor writable. The activated level is indexed by the
stack pointer (SP) and is neither readable nor writeable.
At a subroutine call or interrupt acknowledgment, the
contents of the program counter are pushed onto the
stack. At the end of a subroutine or an interrupt routine,
signaled by a return instruction (RET or RETI), the pro-
gram counter is restored to its previous value from the
stack. After a chip reset, the SP will point to the top of the
stack.
If the stack is full and a non-masked interrupt takes
place, the interrupt request flag will be recorded but the
acknowledgment will be inhibited. When the stack
pointer is decremented (by RET or RETI), the interrupt
will be serviced. This feature prevents stack overflow al-
lowing the programmer to use the structure more easily.
In a similar case, if the stack is full and a
²CALL²
is sub-
sequently executed, stack overflow occurs and the first
entry will be lost (only the most recent 4 return ad-
dresses are stored).
Table Location
Any location in the ROM space can be used as
look-up tables. The instructions
²TABRDC
[m]² (the
current page, one page=256 words) and
²TABRDL
[m]² (the last page) transfer the contents of the
lower-order byte to the specified data memory, and
the higher-order byte to TBLH (08H). Only the desti-
nation of the lower-order byte in the table is
well-defined, the other bits of the table word are trans-
0 0 0 H
0 0 4 H
0 0 8 H
D e v ic e In itia liz a tio n P r o g r a m
E x te r n a l In te r r u p t S u b r o u tin e
T im e r /E v e n t C o u n te r In te r r u p t S u b r o u tin e
P ro g ra m
M e m o ry
L o o k - u p T a b le ( 2 5 6 w o r d s )
n 0 0 H
n F F H
3 F F H
L o o k - u p T a b le ( 2 5 6 w o r d s )
1 4 b its
N o te : n ra n g e s fro m
0 to 3
Program Memory
Instruction
TABRDC [m]
TABRDL [m]
*9
P9
1
*8
P8
1
*7
@7
@7
*6
@6
@6
*5
@5
@5
*4
@4
@4
*3
@3
@3
*2
@2
@2
*1
@1
@1
*0
@0
@0
Table Location
Note: *9~*0: Table location bits
@7~@0: Table pointer bits
P9, P8: Current program counter bits
Rev. 1.90
7
November 4, 2005
HOLTEK [ HOLTEK SEMICONDUCTOR INC ]
