HT48RU80/HT48CU80
Block Diagram
M
U
X
R T C
f
S
Y S
IN T 0
T M R 2 C
T M R 2
M
U
P r e s c a le r
X
M
T M R 2
U
X
T M R 1
M
U
X
T M R 0
E N /D IS
W D T
M
U
X
R T C
f
S
Y S
O S C
In te rru p t
C ir c u it
S ta c k
1 6 L e v e ls
R T C O S C
f
S
Y S
T M R 1 C
T M R 1
M
U
/4
X
P ro g ra m
R O M
P ro g ra m
C o u n te r
IN T C
T M R 0 C
T M R 0
M
U
X
O S C
/4
In s tr u c tio n
R e g is te r
B P
M P
M
U
X
D a ta
M e m o ry
W D T S
W D T
P r e s c a le r
P A
R T C O S C
f
S Y S
/4
W D T O S C
In s tr u c tio n
D e c o d e r
A L U
T im in g
G e n e ra to r
M U X
P A C
S T A T U S
P B
P B C
P C
P C C
O p tio n R O M
O T P O n ly
P A 0 ~ P A 7
E X T (B Z , B Z )
P B 0 /B Z , P B 1 /B Z
P B 2 /IN T 1 , P B 3 /T M R 2
P B 4 ~ P B 7
P C 0 /T X , P C 1 /R X
P C 2 ~ P C 7
S h ifte r
O S C 2
O S
R
V
V
C 1
E S
D D
S S
A C C
In te rn a l
R C O S C
T X
R X
P D
P D C
P E
P E C
P F
P F C
P G
P G C
P D 0 ~ P D 7
U A R T
P E 0 ~ P E 7
P F 0 ~ P F 7
P G 0 ~ P G 7
Rev. 1.00
2
April 12, 2006