HI-8482
PIN DESCRIPTION TABLE
SYMBOL FUNCTION
CAP1A
CAP1B
CAP2A
CAP2B
GND
IN1A
IN1B
IN2A
INPUT
INPUT
INPUT
INPUT
POWER
INPUT
INPUT
INPUT
DESCRIPTION
Filter capacitor input for terminal A of
channel 1
Filter capacitor input for terminal B of
channel 1
Filter capacitor input for terminal A of
channel 2
Filter capacitor input for terminal B of
channel 2
0 Volts
ARINC input terminal A of channel 1
ARINC input terminal B of channel 1
ARINC input terminal A of channel 2
SYMBOL FUNCTION
IN2B
OUT1A
OUT1B
OUT2A
OUT2B
TESTA
TESTB
+V
L
+Vs
-Vs
INPUT
OUTPUT
OUTPUT
OUTPUT
OUTPUT
INPUT
INPUT
POWER
POWER
POWER
DESCRIPTION
ARINC input terminal B of channel 2
TTL output terminal A of channel 1
TTL output terminal B of channel 1
TTL output terminal A of channel 2
TTL output terminal B of channel 2
Test input terminal A
Test input terminal B
+5 Volts ±10%
+12 Volts ±10% or +15 Volts ±10%
-12 Volts ±10% or -15 Volts ±10%
TIMING DIAGRAMS
+10V
ARINC
DIFFERENTIAL
INPUT
0V
-10V
t
PLH
50%
t
r
90%
10%
t
f
OUTA
t
PHL
t
PLH
t
PHL
50%
OUTB
FIGURE 4.
+5V
TESTA
0V
+5V
TESTB
0V
t
TLH
50%
t
r
90%
10%
t
f
OUTA (test)
t
THL
t
TLH
t
THL
50%
OUTB (test)
FIGURE 5.
HOLT INTEGRATED CIRCUITS
4
HOLTIC [ HOLT INTEGRATED CIRCUITS ]
