9
Package Characteristics
(each channel, unless otherwise specified)
Parameter
Symbol
Input-Output
V
ISO
Momentary
Withstand Voltage**
Output-Output
V
O-O
Momentary
Withstand Voltage**
Resistance
R
I-O
(Input - Output)
Capacitance
C
I-O
(Input - Output)
LED-to-Case
Thermal Resistance
LED-to-Detector
Thermal Resistance
Detector-to-Case
Thermal Resistance
θ
LC
θ
LD
θ
DC
Device
HCPL-3150
HCPL-315J
HCPL-315J
Min.
3750
3750
1500
Typ.*
Max. Units
Vrms
Test Conditions
RH < 50%,
t = 1 min.,
T
A
= 25°C
RH < 50%
t = 1 min.,
T
A
= 25°C
V
I-O
= 500 V
DC
f = 1 MHz
Thermocouple
located at center
underside of
package
28
18
Fig.
Note
8, 9
Vrms
17
10
12
HCPL-3150
HCPL-315J
HCPL-3150
HCPL-3150
HCPL-3150
0.6
1.3
391
439
119
Ω
pF
°C/W
°C/W
°C/W
9
*All typical values at T
A
= 25°C and V
CC
- V
EE
= 30 V, unless otherwise noted.
**The Input-Output/Output-Output Momentary Withstand Voltage is a dielectric voltage rating that should not be interpreted as an input-
output/output-output continuous voltage rating. For the continuous voltage rating refer to your equipment level safety specification or Agilent
Application Note 1074 entitled “Optocoupler Input-Output Endurance Voltage.”
Notes:
1. Derate linearly above 70°C free-air
temperature at a rate of 0.3 mA/°C.
2. Maximum pulse width = 10
µs,
maximum duty cycle = 0.2%. This
value is intended to allow for
component tolerances for designs
with I
O
peak minimum = 0.5 A. See
Applications section for additional
details on limiting I
OH
peak.
3. Derate linearly above 70°C free-air
temperature at a rate of 4.8 mW/°C.
4. Derate linearly above 70°C free-air
temperature at a rate of 5.4 mW/°C.
The maximum LED junction tempera-
ture should not exceed 125°C.
5. Maximum pulse width = 50
µs,
maximum duty cycle = 0.5%.
6. In this test V
OH
is measured with a dc
load current. When driving capacitive
loads V
OH
will approach V
CC
as I
OH
approaches zero amps.
7. Maximum pulse width = 1 ms,
maximum duty cycle = 20%.
8. In accordance with UL1577, each
HCPL-3150 optocoupler is proof
tested by applying an insulation test
voltage
≥
4500 Vrms (≥ 5000 Vrms
for the HCPL-315J) for 1 second
(leakage detection current limit, I
I-O
≤
5
µA).
This test is performed
before the 100% production test for
partial discharge (method b) shown
in the IEC/EN/DIN EN 60747-5-2
Insulation Characteristics Table, if
applicable.
9. Device considered a two-terminal
device: pins on input side shorted
together and pins on output side
shorted together.
10. The difference between t
PHL
and t
PLH
between any two parts or channels
under the same test condition.
11. Pins 1 and 4 (HCPL-3150) and pins 3
and 4 (HCPL-315J) need to be
connected to LED common.
12. Common mode transient immunity in
the high state is the maximum
13.
14.
15.
16.
17.
18.
tolerable |dV
CM
/dt| of the common
mode pulse, V
CM
, to assure that the
output will remain in the high state
(i.e., V
O
> 15.0 V).
Common mode transient immunity in
a low state is the maximum tolerable
|dV
CM
/dt| of the common mode
pulse, V
CM
, to assure that the output
will remain in a low state (i.e.,
V
O
< 1.0 V).
This load condition approximates the
gate load of a 1200 V/25 A IGBT.
Pulse Width Distortion (PWD) is
defined as |t
PHL
-t
PLH
| for any given
device.
Each channel.
Device considered a two terminal
device: Channel one output side pins
shorted together, and channel two
output side pins shorted together.
See the thermal model for the
HCPL-315J in the application
section of this data sheet.
HP [ AGILENT(HEWLETT-PACKARD) ]
