TJ2997 参数 Datasheet PDF下载

DDR Termination Regulator

LEVEL SHIFTING

TJ2997

If standards other than SSTL-2 are required, such as SSTL-3, it may be necessary to use a different

scaling factor than 0.5 times V

DDQ

for regulating the output voltage. Several options are available to

scale the output to any voltage required. One method is to level shift the output by using feedback

resistors from V

TT

to the V

SENSE

pin. This has been illustrated in Figures 7 and 8. Figure 7 shows how

to use two resistors to level shift V

TT

above the internal reference voltage of V

DDQ

/ 2. To calculate the

exact voltage at V

TT

the following equation can be used

V

TT

= V

DDQ

/ 2 ( 1 + R1 / R2 )

FIGURE 7. Increasing VTT by Level Shifting

Conversely, the R2 resistor can be placed between V

SENSE

and V

DDQ

to shift the V

TT

output lower than

the internal reference voltage of V

DDQ

/ 2. The equations relating V

TT

and the resistors can be seen

below:

V

TT

= V

DDQ

/ 2 (1 - R1 / R2)

FIGURE 8. Decreasing VTT by Level Shifting

HSTL APPLICATIONS

The TJ2997 can be easily adapted for HSTL applications by connecting V

DDQ

to the 1.5V rail. This will

produce a V

TT

and V

REF

voltage of approximately 0.75V for the termination resistors. It is possible to

connect PV

IN

to higher than a 2.5V rail for higher source/sink current. Care should be taken to do not

exceed the maximum junction temperature as the thermal dissipation increases with lower V

TT

output

voltages (For more information, refer to the Thermal Dissipation section.). The advantage of this

Apr, 2011 - R1.0.1

11/13

HTC