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TJ2997 参数 Datasheet PDF下载

TJ2997图片预览
型号: TJ2997
PDF下载: 下载PDF文件 查看货源
内容描述: DDR终端稳压器 [DDR Termination Regulator]
分类和应用: 稳压器双倍数据速率
文件页数/大小: 13 页 / 406 K
品牌: HTC [ HTC KOREA TAEJIN TECHNOLOGY CO. ]
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DDR Termination Regulator
THERMAL DISSIPATION
TJ2997
Since the TJ2997
is a linear regulator any current flow from V
TT
will result in internal power dissipation
generating heat. To prevent damaging the part from exceeding the maximum allowable junction
temperature, care should be taken to derate the part dependent on the maximum expected ambient
temperature and power dissipation. The maximum allowable internal temperature rise, T
Rmax
can be
calculated given the maximum ambient temperature, T
Amax
of the application and the maximum allowable
junction temperature, T
Jmax
.
T
Rmax
= T
Jmax
T
Amax
From this equation, the maximum allowable power dissipation, P
Dmax
of the part can be
calculated:
P
Dmax
= T
Rmax
/
θ
JA
The maximum allowable value for junction-to-ambient thermal resistance,
θ
JA
, can be calculated using
the formula:
θ
JA
= T
Rmax
/ P
D
= (T
Jmax
– T
Amax
) / P
D
The
θ
JA
of the TJ2997 will be dependent on several variables: the package used; the thickness of
copper; the number of vias and the airflow. For instance, the
θ
JA
of the SOP8 is 165°C/W with the
package mounted to a standard 8x4 2-layer board with 1oz. copper, no airflow, and 0.5W dissipation at
room temperature. This value can be reduced to 152°C/W by changing to a 3x4 board with 2 oz. copper
that is the JEDEC standard.
Additional improvements can be made by the judicious use of vias to connect the part and
dissipate heat to an internal ground plane. Using larger traces and more copper on the top side of
the board can also help.
With careful layout it is possible to reduce the
θ
JA
further than the nominal
values. Additional improvements in lowering the
θ
JA
can also be achieved with a constant airflow
across the package.
Optimizing the
θ
JA
and placing the TJ2997 in a section of a board exposed to lower ambient
temperature allows the part to operate with higher power dissipation. The internal power dissipation
can be calculated by summing the three main sources of loss: output current at V
TT
, either sinking or
sourcing, and quiescent current at AVIN and V
DDQ
. During the active state (when enable is not held low)
the total internal power dissipation can be calculated from the following equations:
P
D
=
P
AVIN
+
P
VDDQ
+ P
VTT
I
AVIN
x
V
AVIN
x
I
VDDQ
=
V
VDDQ2
x
R
VDDQ
Where,
P
AVIN
=
P
VDDQ
=
V
VDDQ
To calculate the maximum power dissipation at
V
TT
both conditions at
V
TT
need to be examined,
Apr, 2011 - R1.0.1
7/13
HTC