Overview
0-1
0. Overview
0.1 GMS30C2216/32 RISC/DSP
The HME
GMS30C2232
and
GMS30C2216
RISC/DSP is an improved version of
HME’s existing
GMS30C2132
and
GMS30C2116 RISC/DSP.
Using a 0.35 µm CMOS
technology, the performance of the RISC/DSP could be further improved. Being pin-
compatible to their predecessors, these new RISC/DSP can be used as a direct replacement
in existing customer’s designs.
The
GMS30C2216
and
GMS30C2232
RISC/DSP are based on
hyperstone
architecture.
Improved Points
•
Maximum Operating Frequency : 108MHz @3.3V
•
Operating Voltage : 3. 3V ±0.3V
•
8KByte on-chip memory
•
On chip Phased Locked Loop circuit (x0.5, x1, x2, x4)
•
Boot bus width selectable by two external pins
•
Wait Pin Function
•
On chip DRAM controller : FPM(Fast-Page-Mode), (Extended-Data-Out) EDO DRAMs.
•
5.0V Tolerant Input
•
Control CLKOUT pin Function
This combination of a high-performance RISC microprocessor with an additional powerful
DSP instruction set and on-chip microcontroller functions offers a high throughput. The
speed is obtained by an optimized combination of the following features:
•
Pipelined memory access allows overlapping of memory accesses with execution.
•
8KByte on-chip memory.
•
On-chip instruction cache omits instruction fetch in inner loops and provides prefetch.
•
Variable-length instructions of 16, 32 or 48 bits provide a large, powerful instruction set,
thereby reducing the number of instructions to be executed.
•
Primarily used 16-bit instructions halve the memory bandwidth required for instruction
fetch in comparison to conventional RISC architectures with fixed-length 32-bit
instructions, yielding also even better code economy than conventional CISC
architectures.
•
Orthogonal instruction set
•
Most instructions execute in one cycle.
•
Pipelined DSP instructions.
•
Parallel execution of ALU and DSP instructions.
•
Single-cycle halfword multiply-accumulate operation.
•
Fast Call and Return by parameter passing via registers.
HYNIX [ HYNIX SEMICONDUCTOR ]
