GMS81508B/16B/24B
HYUNDAI MicroElectronics
10. BASIC INTERVAL TIMER
The GMS815xxB has one 8-bit Basic Interval Timer that
is free-run and can not stop. Block diagram is shown in
In addition, the Basic Interval Timer generates the time
base for watchdog timer counting. It also provides a Basic
interval timer interrupt (BITIF). As the count overflow
from FF
H
to 00
H
, this overflow causes the interrupt to be
generated. The Basic Interval Timer is controlled by the
clock control register (CKCTLR) shown in Figure 10-2.
Source clock can be selected by lower 3 bits of CKCTLR.
BITR and CKCTLR are located at same address, and ad-
dress 0F9
H
is read as a BITR, and written to CKCTLR.
÷
16
÷
32
÷
64
Prescaler
X
IN
PIN
÷
128
÷
256
÷
512
÷
1024
÷
2048
MUX
source
clock
8-bit up-counter
overflow
BITR
[0F9
H
]
clear
BITIF
Basic Interval Timer Interrupt
To Watchdog timer (WDTCK)
Select Input clock 3
BTS[2:0]
[0D3
H
]
Basic Interval Timer
clock control register
Internal bus line
CKCTLR
Read
BTCL
Figure 10-1 Block Diagram of Basic Interval Timer
CKCTLR
[2:0]
000
001
010
011
100
101
110
111
Source clock
f
XIN
÷16
f
XIN
÷32
f
XIN
÷64
f
XIN
÷128
f
XIN
÷256
f
XIN
÷512
f
XIN
÷1024
f
XIN
÷
2048
Interrupt (overflow) Period (ms)
@ f
XIN
= 8MHz
0.512
1.024
2.048
4.096
8.192
16.384
32.768
65.536
Table 10-1 Basic Interval Timer Interrupt Time
34
DEC. 1999 Ver 1.04
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