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GMS81C2112Q 参数 Datasheet PDF下载

GMS81C2112Q图片预览
型号: GMS81C2112Q
PDF下载: 下载PDF文件 查看货源
内容描述: 海力士半导体的8位单芯片微控制器产品 [HYNIX SEMICONDUCTOR 8-BIT SINGLE-CHIP MICROCONTROLLERS]
分类和应用: 半导体微控制器
文件页数/大小: 107 页 / 1484 K
品牌: HYNIX [ HYNIX SEMICONDUCTOR ]
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GMS81C2112/GMS81C2120
8.3 Data Memory
ble. Data Memory is divided into two groups, a user RAM
(including Stack) and control registers.
0000
H
digital converters and I/O ports. The control registers are in
address range of 0C0
H
to 0FF
H
.
Note that unoccupied addresses may not be implemented
on the chip. Read accesses to these addresses will in gen-
eral return random data, and write accesses will have an in-
determinate effect.
More detailed informations of each register are explained
in each peripheral section.
User Memory
PAGE0
00BF
H
00C0
H
00FF
H
0100
H
When “G-flag=0”,
this page is selected
Control
Registers
Note:
Write only registers can not be accessed by bit ma-
nipulation instruction. Do not use read-modify-write instruc-
tion. Use byte manipulation instruction, for example “LDM”.
Example; To write at CKCTLR
LDM
User Memory
or Stack Area
PAGE1
When “G-flag=1”
CLCTLR,#09H
;Divide ratio(÷16)
01FF
H
Stack Area
The stack provides the area where the return address is
saved before a jump is performed during the processing
routine at the execution of a subroutine call instruction or
the acceptance of an interrupt.
When returning from the processing routine, executing the
subroutine return instruction [RET] restores the contents of
the program counter from the stack; executing the interrupt
return instruction [RETI] restores the contents of the pro-
gram counter and flags.
The save/restore locations in the stack are determined by
the stack pointed (SP). The SP is automatically decreased
after the saving, and increased before the restoring. This
means the value of the SP indicates the stack location
number for the next save. Refer to Figure 8-4 on page 22.
Figure 8-8 Data Memory Map
User Memory
The GMS81C21xx have 448
×
8 bits for the user memory
(RAM).
Control Registers
The control registers are used by the CPU and Peripheral
function blocks for controlling the desired operation of the
device. Therefore these registers contain control and status
bits for the interrupt system, the timer/ counters, analog to
26
JUNE. 2001 Ver 1.00