Read/Reset Command
The read or reset operation is initiated by writing
the Read/Reset command sequence in to the com-
mand register. Microprocessor read cycles retrieve
the data from the memory. The device remains
enabled for reads until the command register con-
tents are changed.
The device will automatically power-up in the Read/
Reset mode. In this case, a command sequence
is not needed to read the memory data. This de-
fault power-up to Read mode ensures that no spu-
rious changes of the data can take place during
the power transitions. Refer to the AC Character-
istics for Read-Only Operation and the respective
Timing Waveforms for the specific timing param-
eters.
the falling edge of /CE or /WE, whichever hap-
pens later, and program data (PD) is latched on
the rising edge of /CE or /WE, whichever happens
first. The rising edge of /CE or /WE, whichever
happens first, begins byte programming.
Upon executing the Byte Programming command
sequence, the device’s internal state machine ex-
ecutes an internal byte programming algorithm. The
system is not required to provide further con-
trols or timings. The device will automatically pro-
vide adequate internally generated program pulses
and verify the programmed cell margin of the byte.
During byte programming operation, data bit DQ7
shows the complement of the program data. This
operation is known as /Data Polling. The internal
byte programming algorithm has completed it’s
operation when the data on DQ7 is equivalent to
the last data written to this bit (see Write Operation
Status section). At the completion of the byte pro-
gramming algorithm, the device returns to the read
mode. At this time, the address pins are no longer
latched. Therefore, the system must supply the last
program address at the completion of the byte pro-
gramming operation to read the correct program
data on DQ7.
Byte programming is allowed in any sequence, and
across sector boundaries. However, remember that
a data “0” cannot be programmed to a data ”1".
Only erase operations can convert a logical ”0" to a
logical “1”. Attempting to program data from “0” to
“1” may cause the device to exceed time limits, or
even worse, result in an apparent success accord-
ing to the /Data Polling algorithm. In the later case,
however, a subsequent read of this bit will show
that the data is still a logical “0”.
Figure 1 illustrates the Byte Programming
Algorithm using typical command strings and bus
operations.
Electronic ID Command
The HY29F040A contains an Electronic ID com-
mand to supplement the traditional PROM
programming method described in the Electronic
ID Mode section. The operation is initiated by
writing the Electronic ID command sequence into
the command register. Following the command
write, a read cycle from address XX00H retrieves
manufacturer code of ADH. A read cycle from ad-
dress XX01H returns the device code A4H (see
Table 2). All manufacturer and device codes will
exhibit odd parity with the MSB (DQ7) defined as
the parity bit.
The Electronic ID command can also be used
to identify protected sectors. After writing the
Electronic ID command sequence, the CPU can
scan the sector addresses (A18, A17, A16) while
(A6, A1, A0) = (0, 1, 0). Protected sectors will
return 01H on the data outputs and unprotected
sectors will return 00H. To terminate the operation, it
is necessary to write the Read/Reset command
sequence into the command register.
Byte Programming Command
The HY29F040A is programmed one byte at a time.
Programming is a four bus cycle operation (see
Table 4). The program address (PA) is latched on
8
Chip Erase Command
Chip erase is a six bus cycle operation (see Table 4).
Chip erase begins on the rising edge of the last /
WE pulse in the command sequence. There are
two 'unlock' write cycles. These are followed by
HY29F040A
HYNIX [ HYNIX SEMICONDUCTOR ]
