Table 3. Sector Addresses
A18
SA0
SA1
SA2
SA3
SA4
SA5
SA6
SA7
0
0
0
0
1
1
1
1
A17
0
0
1
1
0
0
1
1
A16
0
1
0
1
0
1
0
1
Address Range
00000H - 0FFFFH
10000H - 1FFFFH
20000H - 2FFFFH
30000H - 3FFFFH
40000H - 4FFFFH
50000H - 5FFFFH
60000H - 6FFFFH
70000H - 7FFFFH
Electronic ID Mode
The Electronic ID mode allows the reading out of
a binary code from the device and will identify its
manufacturer and device type. This mode is in-
tended for use by programming equipment for the
purpose of automatically matching the device to be
programmed with its corresponding programming
algorithm. This mode is functional over the entire
temperature range of the device.
To activate this mode, the programming equipment
must force V
ID
(11.5V to 12.5V) on address pin
A9. Two identifier bytes may then be sequenced
from the device outputs by toggling address A0
from V
IL
to V
IH
. All addresses are don’t cares ex-
cept A0, A1, A6, and A9.
The manufacturer and device codes may also be
read via the command register, (i.e., when
HY29F040A is erased or programmed in a system
without access to high voltage on the A9 pin). The
command sequence is illustrated in Table 4 (refer
to Electronic ID Command section).
Byte 0 (A0=V
IL
) represents the manufacturer’s code
(Hyundai Electronics=ADH) and byte 1 (A0=V
IH
)
the device identifier code (HY29F040A=A4H).
These two bytes are given in Table 2. All identifi-
ers for manufacturer and devices will exhibit odd
parity with the MSB (DQ7) defined as the parity
bit. To permit reading of the proper device codes
when executing the Electronic ID, A1 must be V
IL
(see Table 2).
Read Mode
The HY29F040A has three control functions which
must be satisfied to obtain data at the outputs. /
CE is the power control and should be used for
device selection. /OE is the output control and
should be used to gate data to the output pins if a
device is selected. As shown in Table 1, /WE
should be held at V
IH
, except in Write mode and
Enable Sector Protect mode.
Address access time (t
ACC
) is equal to the delay
from stable addresses to valid output data. The
chip enable access time (t
CE
) is the delay from
stable addresses and stable /CE to valid data at
the output pins. The output enable access time is
the delay from the falling edge of /OE to valid data
at the output pins (assuming the addresses have
been stable for at least t
ACC
-t
OE
time).
Standby Mode
The HY29F040A has two standby modes: a CMOS
standby mode (/CE input held at Vcc ± 0.5V), when
current consumed is typically less than 1
mA;
and a
TTL standby mode (/CE is held at V
IH
) when the
typical current required is reduced to 1 mA. In
standby mode, outputs are in a high impedance
state, independent of /OE input.
If the device is deselected during programming or
erase, the device will draw active current until the
programming or erase operation is completed.
HY29F040A
5
HYNIX [ HYNIX SEMICONDUCTOR ]
