1HY5DU281622ETP
DESCRIPTION
The Hynix HY5DU281622ETP is a 134,217,728-bit CMOS Double Data Rate(DDR) Synchronous DRAM, ideally suited for
the point-to-point applications which require high densities and high bandwidth.
The Hynix 8Mx16 DDR SDRAMs offer fully synchronous operations referenced to both rising and falling edges of the
clock. While all addresses and control inputs are latched on the rising edges of the CK (falling edges of the /CK), Data,
Data strobes and Write data masks inputs are sampled on both rising and falling edges of it. The data paths are inter-
nally pipelined and 2-bit prefetched to achieve very high bandwidth. All input and output voltage levels are compatible
with SSTL_2.
FEATURES
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2.8V +/- 0.1V V
DD
and V
DDQ
power supply
supports 400/375/350/333/300MHz
2.5V +/- 5% V
DD
and V
DDQ
power supply
supports 275/250/200/166MHz
All inputs and outputs are compatible with SSTL_2
interface
JEDEC Standard 400 mil x 875 mil 66 Pin TSOP II,
with 0.65mm pin pitch
Fully differential clock inputs (CK, /CK) operation
Double data rate interface
Source synchronous - data transaction aligned to
bidirectional data strobe (UDQS,LDQS)
Data outputs on DQS edges when read (edged DQ)
Data inputs on DQS centers when write (centered
DQ)
Data(DQ) and Write masks(DM) latched on the both
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rising and falling edges of the data strobe
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All addresses and control inputs except Data, Data
strobes and Data masks latched on the rising edges
of the clock
Write mask byte controls by DM (UDM,LDM)
Programmable /CAS Latency 5, 4 and 3 are sup-
ported
Programmable Burst Length 2, 4 and 8 with both
sequential and interleave mode
Internal 4 bank operation with single pulsed /RAS
tRAS Lock-Out function are supported
Auto refresh and self refresh are supported
4096 refresh cycles / 32ms
Full strength, Half strength and Weak Impedance
driver options controlled by EMRS
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ORDERING INFORMATION
Part No.
HY5DU281622ETP-25
HY5DU281622ETP-26
HY5DU281622ETP-28
HY5DU281622ETP-30
HY5DU281622ETP-33
HY5DU281622ETP-36
HY5DU281622ETP-4
HY5DU281622ETP-5
Power
Supply
Clock
Frequency
400MHz
375MHz
350MHz
333MHz
300MHz
275MHz
250MHz
200MHz
Max Data Rate
800Mbps/pin
750Mbps/pin
700Mbps/pin
666Mbps/pin
600Mbps/pin
550Mbps/pin
500Mbps/pin
400Mbps/pin
interface
Package
VDD/VDDQ=2.8V
SSTL_2
400 x 875mil
2
66 Pin TSOP II
VDD/VDDQ=2.5V
Note) Hynix supports Lead free parts for each speed grade with same specification, except Lead free material.
We'll add "P" character after "T" for Pb free product. For example, the part number of 300MHz Lead free
Product is HY5DU281622ETP-33.
Rev. 1.0 / Oct. 2005
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