iC-NQC
preliminar y
Rev B1, Page 18/29
13-bit Sin/D CONVERTER WITH SIGNAL CALIBRATION
If an error in amplitude occurs, conversion is termi-
nated and the incremental output signals halted. An
error in amplitude rules out the possibility of an error in
frequency.
TEST FUNCTIONS
TMODE
Code
0x00
0x01
0x02
0x03
0x04
0x05
0x06
0x07
Condition
Adr 0x06, Bit 3:1
Signal at Z
Z
A xor B
ENCLK
NLOCK
CLK
DIVC
PZERO - NZERO
TP
CFGABZ = 0x00
TMA
Code
0x00
0x01
Notes
Adr 0x06, Bit 0
Pin A
Pin B
A
COS+
B
COS-
Description
no test mode
Output A EXOR B
iC-Haus device test
iC-Haus device test
iC-Haus device test
iC-Haus device test
iC-Haus device test
iC-Haus device test
Pin SDA
SDA
SIN+
Pin SCL
SCL
SIN-
To permit the verification of GAIN and OFFSET
settings, signals are output after the input amplifier.
A converter signal of 4 Vpp is the ideal here and
should not be exceeded. Loads of 1 MΩ and above
are recommended for accurate measurement.
EEPROM access is not possible during mode TMA.
Table 32: Analog test mode
Table 31: Test mode
The signal is set to ca. 4 Vpp using GAIN and must not
be altered after calibration. Both display modes are
suitable for OFFS (positive values) and RATIO adjust-
ments; X/Y mode is preferable for PHASE. Test signals
COS- (pin B) and SIN- (pin SCL) must be selected to
set negative values for OFFS.
5V
A: COS+
SDA: Sin+
0V
Y/T 1 V/Div vert.
X/Y 1 V/Div vert. 1 V/Div hor.
Figure 15: Calibrated signals in TMA mode.