X24012
DEVICE ADDRESSING
Following a start condition the master must output the
address of the slave it is accessing. The most significant
four bits of the slave address are the device type
identifier (see Figure 4). For the X24012 this is fixed as
Following the start condition, the X24012 monitors the SDA
bus comparing the slave address being transmit-
ted with its slave address (device type and state of A
0
, A
1
and A
2
inputs). Upon a correct compare the X24012
outputs an acknowledge on the SDA line. Depending on the
state of the R/W bit, the X24012 will execute a read
or write operation.
WRITE OPERATIONS
Byte Write
For a write operation, the X24012 requires a second
address field. This address field is the word address,
0
A2
A1
A0
R/W
1010[B].
Figure 4. Slave Address
DEVICE TYPE
IDENTIFIER
1
0
1
comprised of eight bits, providing access to any one of the
128 words of memory. Note: the most significant bit
is a don’t care. Upon receipt of the word address the
X24012 responds with an acknowledge, and awaits the
next eight bits of data, again responding with an ac-
knowledge. The master then terminates the transfer by
DEVICE
ADDRESS
3847 FHD F08
The next three significant bits address a particular device.
A system could have up to eight X24012 devices
on the bus (see Figure 10). The eight addresses are defined
by the state of the A
0
, A
1
and A
2
inputs.
The last bit of the slave address defines the operation to be
performed. When set to one a read operation is
selected, when set to zero a write operation is selected.
generating a stop condition, at which time the X24012 begins
the internal write cycle to the nonvolatile memory.
While the internal write cycle is in progress the X24012
inputs are disabled, and the device will not respond to
any requests from the master. Refer to Figure 5 for the
address, acknowledge and data transfer sequence.
Figure 5. Byte Write
S
T
BUS ACTIVITY:
MASTER
A
R
SLAVE
ADDRESS
WORD
ADDRESS
DATA
S
T
O
P
T
SDA LINE
SDA LINE
BUS ACTIVITY:
BUS ACTIVITY:
X24012
X24012
S
A
C
A
C
A
C
P
K
K
K
3847 FHD F09
Figure 6. Page Write
S
T
BUS ACTIVITY:
BUS
MASTER
MASTER
A
R
T
S
SLAVE
ADDRESS
WORD ADDRESS n
DATA n
DATA n–1
DATA n+3
S
T
O
P
SDA LINE
SDA LINE
BUS ACTIVITY:
BUS ACTIVITY:
X24012
X24012
P
A
C
K
A
C
K
A
C
K
A
C
K
A
C
K
3847 FHD F10
NOTE: In this example n = xxxx 0000 (B); x = 1 or 0
5
ICMIC [ IC MICROSYSTEMS ]
