X24C01A
A.C. CONDITIONS OF TEST
Input Pulse Levels
Input Rise and Fall Times
Input and Output Timing Levels
V
CC
x 0.1 to V
CC
x 0.9
10ns
V
CC
x 0.5
3841 PGM T07
EQUIVALENT A.C. LOAD CIRCUIT
5.0V
1533Ο
Output
100pF
3841 FHD F17
A.C. CHARACTERISTICS LIMITS
(Over recommended operating conditions unless otherwise specified)
Read & Write Cycle Limits
Symbol
f
SCL
T
I
t
AA
t
BUF
t
HD:STA
t
LOW
t
HIGH
t
SU:STA
t
HD:DAT
t
SU:DAT
t
R
t
F
t
SU:STO
t
DH
Parameter
SCL Clock Frequency
Noise Suppression Time Constant at SCL, SDA Inputs
SCL Low to SDA Data Out Valid
Time the Bus Must Be Free Before a New Transmission Can Start
Start Condition Hold Time
Clock Low Period
Clock High Period
Start Condition Setup Time
Data In Hold Time
Data In Setup Time
SDA and SCL Rise Time
SDA and SCL Fall Time
Stop Condition Setup Time
Data Out Hold Time
Min.
0
0.3
4.7
4.0
4.7
4.0
4.7
0
250
Max.
100
100
3.5
Units
KHz
ns
∝s
∝s
∝s
∝s
∝s
∝s
∝s
ns
∝s
ns
∝s
ns
3841 PGM T08
1
300
4.7
300
POWER-UP TIMING
Symbol
t
PUR(4)
t
PUW(4)
Bus Timing
t
F
t
HIGH
t
LOW
t
R
Parameter
Power-Up to Read Operation
Power-Up to Write Operation
Max.
1
5
Units
ms
ms
3841 PGM T09
SCL
t
SU:STA
t
HD:STA
t
HD:DAT
t
SU:DAT
t
SU:STO
SDA IN
t
AA
t
DH
t
BUF
SDA OUT
3841 FHD F03
Note:
(4)t
PUR
and t
PUW
are the delays required from the time V
CC is stable until the specified operation can be initiated. These
parameters are periodically sampled and not 100% tested.
9
ICMIC [ IC MICROSYSTEMS ]
