Integrated
Circuit
Systems, Inc.
ICS85222-01
D
UAL
LVCMOS / LVTTL-
TO
-
D
IFFERENTIAL
HSTL T
RANSLATOR
physically located near the power pin. For ICS85222-01, the
unused output need to be terminated.
S
CHEMATIC
E
XAMPLE
Figure 2
shows a schematic example of ICS85222-01. In this
example, the inputs are driven by 7Ω output LVCMOS drivers
with series terminations. The decoupling capacitors should be
VDD=3.3V
Zo = 50 Ohm
Q1
Ro ~ 7 Ohm
Zo = 50 Ohm
43
5
6
7
8
U1
GND
CLK1
CLK0
VDD
ICS85222-01
VDD=3.3V
VDD=3.3V
Q2
Zo = 50 Ohm
Ro ~ 7 Ohm
Zo = 50 Ohm
R3
50
+
R4 LVHSTL Input
50
C1
0.1u
Zo = 50 Ohm
-
nQ1
Q1
nQ0
Q0
4
3
2
1
Zo = 50 Ohm
+
R1
50
R2
50 LVHSTL Input
-
R5
Driv er_LVCMOS
R6
Driv er_LVCMOS
43
F
IGURE
2. ICS85222-01 HSTL B
UFFER
S
CHEMATIC
E
XAMPLE
85222AM-01
www.icst.com/products/hiperclocks.html
7
REV. A NOVEMBER 15, 2005
ICS [ INTEGRATED CIRCUIT SYSTEMS ]
