IC42S81600/IC42S81600L
IC42S16800/IC42S16800L
DC CHARACTERISTICS 1
(At V
DD
= V
DDQ
= 3.3 ± 0.3V, V
SS
= V
SSQ
= 0V , unless otherwise noted)
Symbol Parameter
I
CC
1
(1)
Operating Current
t
RC
= t
RC
(min.)
I
CC
2P
I
CC
2PS
I
CC
2N
(2)
t
CLK
= t
CLK
(min.)
Precharge Standby Current CKE
≤
V
IL
(
MAX
)
(In Power-Down Mode)
t
CK
= 15 ns
CKE
≤
V
IL
(
MAX
)
CLK
≤
V
IL
(
MAX
)
Precharge Standby Current
CS
≥
V
CC
-0.2V
(In Non Power-Down Mode) CKE
≥
V
IH
(
MIN
)
t
CK
= 15 ns
CS
≥
V
CC
-0.2V
CKE
≥
V
IH
(
MIN
)
CKE
≤
V
IL
(
MAX
)
Active Standby Current
CS
≥
V
CC
-0.2V
(In Non Power-Down Mode) CKE
≥
V
IH
(
MIN
)
t
CK
= 15 ns
CS
≥
V
CC
-0.2V
CKE
≥
V
IH
(
MIN
)
CKE
≤
V
IL
(
MAX
)
Operating Current
(In Burst Mode)
CL latency = 3
Auto-Refresh Current
Self-Refresh Current
x8/x16
x8/x16
x8/x16
2
1
25
2
1
25
2
1
25
mA
mA
mA
Test Condition
One Bank
active
,
CL=3, BL=1
Organization
-6
x8
x16
120
140
Max.
-7
100
120
Unit
-8
100
120
mA
mA
I
CC
2NS
x8/x16
15
15
15
mA
All input signals are stable.
I
CC
3N
(2)
x8/x16
30
30
30
mA
I
CC
3NS
x8/x16
20
20
20
mA
I
CC
4
All input signals are stable.
All Banks active
x8
170
180
180
2
0.8
120
130
160
2
0.8
120
130
160
2
0.8
mA
mA
mA
mA
mA
BL=4
t
CK
= t
CK
(
MIN
)
t
RC
= t
RC
(
MIN
)
t
CLK
= t
CLK
(
MIN
)
CKE
≤
0.2V
x16
x8/x16
x8/x16, normal
x8/x16, Low power
I
CC
5
I
CC
6
(3, 4)
Notes:
1. I
CC
(max) is specified at the output open condition.
2. Input signals are changed one time during 30ns.
3. Normal version: IC42S81600/IC42S16800
4. Low power version: IC42S81600L/IC42S16800L
DC CHARACTERISTICS 2
(V
DD
= 3.3 ± 0.3V, V
SS
= V
SSQ
= 0V , unless otherwise noted)
Parameter
Input Leakage Current
(Inputs)
Output Leakage Current
(I/O pins)
High Level Output Voltage
Low Level Output Voltage
Integrated Circuit Solution Inc.
DR023-0E 6/11/2004
Symbol
I
I (L)
I
O (L)
V
OH
(DC)
V
OL
(DC)
Test Condition
0
≤
V
IN
≤
V
DD
(
MAX
)
Pins not under test = 0V
Min
–10
–5
2.4
—
Max
10
5
—
0.4
Unit
µA
µA
V
V
7
0
≤
V
OUT
≤
V
DD
(
MAX
)
I
OH
= –2 mA
I
OL
= 2 mA
DQ# in H - Z., D
OUT
is disabled