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IC42S16800-6TG 参数 Datasheet PDF下载

IC42S16800-6TG图片预览
型号: IC42S16800-6TG
PDF下载: 下载PDF文件 查看货源
内容描述: 4(2)的M× 8 (16)位×4银行(128 - MBIT )同步动态RAM [4(2)M x 8(16) Bits x 4 Banks (128-MBIT) SYNCHRONOUS DYNAMIC RAM]
分类和应用: 存储内存集成电路光电二极管动态存储器时钟
文件页数/大小: 69 页 / 1117 K
品牌: ICSI [ INTEGRATED CIRCUIT SOLUTION INC ]
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IC42S81600/IC42S81600L
IC42S16800/IC42S16800L
AC ELECTRICAL CHARACTERISTICS
(At V
DD
= V
DDQ
= 3.3 ± 0.3V, V
SS
= V
SSQ
= 0V , unless otherwise noted)
-6
Symbol
t
CK
3
t
CK
2
t
AC
3
t
AC
2
t
CH
t
CL
t
CKE
t
CKH
t
AS
t
AH
t
CMS
t
CMH
t
DS
t
DH
t
OH
3
t
OH
2
t
LZ
t
HZ
t
RC
t
RAS
t
RCD
t
RP
t
RRD
t
T
t
RSC
t
PDE
t
SRX
t
DPL
t
DAL
t
REF
Parameter
CLK Cycle Time
CL= 3
CL= 2
CL= 3
CL= 2
Min.
Max.
5.4
5.4
5.4
100K
10
64
Min.
7.5
10
2.5
2.5
1.5
0.8
1.5
0.8
1.5
0.8
1.5
0.8
2.7
3
0
2.7
67.5
45
20
20
15
1
15
7.5
7.5
15
35
6
7.5
CLK to valid output delay
(1)
CLK high pulse width
2.5
CLK low pulse width
2.5
CKE setup time
1.5
CKE hold time
0.8
Address setup time
1.5
Address hold time
0.8
Command setup time
1.5
Command hold time
0.8
Data input setup time
1.5
Data input hold time
0.8
(1)
Output data hold time
CL= 3
2.7
CL= 2
2.7
CLK to output in low - Z
0
CLK to output in H - Z
2.7
ROW cycle time
60.0
ROW active time
42
RAS
to
CAS
delay
18
Row precharge time
15
Row active to active delay
12
Transition time
1
Mode reg. set cycle
12
Power down exit setup time
6
Self refresh exit time
6
Data in to Precharge
12
Data in to Active/Refresh Delay Time
27
Refresh Time
-7
Max.
5.4
6
5.4
100K
10
64
Min.
8
10
3
3
2
1
2
1
2
1
2
1
3
3
0
3
70
50
20
20
20
1
20
10
10
16
36
-8
Max.
6
6
6
100K
10
64
Units
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ms
Notes:
1. if clock rising time is longer than 1ns, (tr/2-0.5ns) should be added to the parameter.
Integrated Circuit Solution Inc.
DR023-0E 6/11/2004
9