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IC62LV256L-15J 参数 Datasheet PDF下载

IC62LV256L-15J图片预览
型号: IC62LV256L-15J
PDF下载: 下载PDF文件 查看货源
内容描述: 32K ×8低功耗SRAM与3.3V [32K x 8 Low Power SRAM with 3.3V]
分类和应用: 静态存储器
文件页数/大小: 9 页 / 110 K
品牌: ICSI [ INTEGRATED CIRCUIT SOLUTION INC ]
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IC62LV256L
READ CYCLE SWITCHING CHARACTERISTICS
(1)
(Over Operating Range)
Symbol
Parameter
Read Cycle Time
Address Access Time
Output Hold Time
CE
Access Time
OE
Access Time
OE
to Low-Z Output
OE
to High-Z Output
CE
to Low-Z Output
CE
to High-Z Output
CE
to Power-Up
CE
to Power-Down
-15 ns
Min. Max.
15
2
0
3
0
15
15
7
8
6
15
-20 ns
Min. Max.
20
2
0
3
0
20
20
8
9
9
18
-25 ns
Min. Max.
25
2
0
3
0
25
25
9
10
10
20
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
t
RC
t
AA
t
OHA
t
ACE
t
DOE
t
LZOE
(2)
t
HZOE
(2)
t
LZCE
(2)
t
HZCE
(2)
t
PU
(3)
t
PD
(3)
Notes:
1. Test conditions assume signal transition times of 3 ns or less, timing reference levels of 1.5V, input pulse levels of 0 to 3.0V
and output loading specified in Figure 1.
2. Tested with the load in Figure 2. Transition is measured
±
500 mV from steady-state voltage. Not 100% tested.
3. Not 100% tested.
AC TEST CONDITIONS
Parameter
Input Pulse Level
Input Rise and Fall Times
Input and Output Timing
and Reference Levels
Output Load
Unit
0V to 3.0V
3 ns
1.5V
See Figures 1 and 2
AC TEST LOADS
635
3.3V
3.3V
635
OUTPUT
30 pF
Including
jig and
scope
702
OUTPUT
5 pF
Including
jig and
scope
702
Figure 1.
Figure 2.
Integrated Circuit Solution Inc.
ALSR008-0A 10/5/2001
5