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IS61LV25616-8K 参数 Datasheet PDF下载

IS61LV25616-8K图片预览
型号: IS61LV25616-8K
PDF下载: 下载PDF文件 查看货源
内容描述: 256× 16高速异步静态CMOS与3.3V供电的RAM [256 X 16 HIGH SPEED ASYNCHRONOUS CMOS STATIC RAM WITH 3.3V SUPPLY]
分类和应用:
文件页数/大小: 10 页 / 460 K
品牌: ICSI [ INTEGRATED CIRCUIT SOLUTION INC ]
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IS61LV25616
CAPACITANCE
(1)
Symbol
C
IN
C
OUT
Parameter
Input Capacitance
Input/Output Capacitance
Conditions
V
IN
= 0V
V
OUT
= 0V
Max.
6
8
Unit
pF
pF
READ CYCLE SWITCHING CHARACTERISTICS
(1)
(Over Operating Range)
Symbol
Parameter
Read Cycle Time
Address Access Time
Output Hold Time
CE
Access Time
OE
Access Time
Min.
8
—
3
—
—
0
0
0
3
—
0
0
-8
Max.
—
8
—
8
4
4
—
4
—
4
4
—
-10
Min. Max.
10
—
3
—
—
—
0
0
3
—
0
0
—
10
—
10
5
5
—
5
—
5
5
—
-12
Min. Max.
12
—
3
—
—
—
0
0
3
—
0
0
—
12
—
12
6
6
—
6
—
6
6
—
-15
Min. Max.
15
—
3
—
—
0
0
0
3
—
0
0
—
15
—
15
7
6
—
6
—
7
6
—
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
Note:
1. Tested initially and after any design or process changes that may affect these parameters.
t
RC
t
AA
t
OHA
t
ACE
t
DOE
t
HZOE
 
OE
to High-Z Output
t
LZOE
 
OE
to Low-Z Output
t
HZCE

t
BA
t
HZB
t
LZB
CE
to High-Z Output
LB, UB
Access Time
LB, UB
to High-Z Output
LB, UB
to Low-Z Output
t
LZCE
 
CE
to Low-Z Output
Notes:
1. Test conditions assume signal transition times of 3 ns or less, timing reference levels of 1.5V, input pulse levels of
0 to 3.0V and output loading specified in Figure 1a.
2. Tested with the load in Figure 1b. Transition is measured ±500 mV from steady-state voltage. Not 100% tested.
3. Not 100% tested.
AC TEST CONDITIONS
Parameter
Input Pulse Level
Input Rise and Fall Times
Input and Output Timing
and Reference Level
Output Load
Unit
0V to 3.0V
3 ns
1.5V
See Figures 1 and 2
Notes:
1. The Vcc operating range for 8 ns is 3.3V +10%, -5%.
AC TEST LOADS
3.3V
319
3.3V
319
OUTPUT
30 pF
Including
jig and
scope
353
OUTPUT
5 pF
Including
jig and
scope
353
Figure 1
4
Figure 2
Integrated Circuit Solution Inc.
SR040-0C