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IS61LV256-12JI 参数 Datasheet PDF下载

IS61LV256-12JI图片预览
型号: IS61LV256-12JI
PDF下载: 下载PDF文件 查看货源
内容描述: 32K ×8低压CMOS静态RAM [32K X 8 LOW VOLTAGE CMOS STATIC RAM]
分类和应用: 存储内存集成电路静态存储器光电二极管
文件页数/大小: 8 页 / 121 K
品牌: ICSI [ INTEGRATED CIRCUIT SOLUTION INC ]
 浏览型号IS61LV256-12JI的Datasheet PDF文件第1页浏览型号IS61LV256-12JI的Datasheet PDF文件第2页浏览型号IS61LV256-12JI的Datasheet PDF文件第3页浏览型号IS61LV256-12JI的Datasheet PDF文件第5页浏览型号IS61LV256-12JI的Datasheet PDF文件第6页浏览型号IS61LV256-12JI的Datasheet PDF文件第7页浏览型号IS61LV256-12JI的Datasheet PDF文件第8页  
IS61LV256
READ CYCLE SWITCHING CHARACTERISTICS
(1)
(Over Operating Range)
Symbol
Parameter
Read Cycle Time
Address Access Time
Output Hold Time
CE
Access Time
OE
Access Time
Min. Max.
-8 ns
Min. Max.
-10 ns
Min. Max.
-12 ns
Min. Max.
-15 ns
Min. Max.
-20 ns
Unit
t
RC
t
AA
t
OHA
t
ACE
t
DOE
8
—
2
—
—
0
—
3
—
0
—
—
8
—
8
4
—
4
—
4
—
8
10
—
2
—
—
0
—
3
—
0
—
—
10
—
10
5
—
5
—
5
—
10
12
—
2
—
—
0
—
3
—
0
—
—
12
—
12
6
—
5
—
6
—
12
15
—
2
—
—
0
—
3
—
0
—
—
15
—
15
7
—
6
—
7
—
15
20
—
2
—
—
0
—
3
—
0
—
—
20
—
20
8
—
6
—
7
—
20
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
t
LZOE
 
OE
to Low-Z Output
t
HZOE
 
OE
to High-Z Output
t
LZCE
 
CE
to Low-Z Output
t
HZCE
 
CE
to High-Z Output
t
PU
!
t
PD
"
CE
to Power-Up
CE
to Power-Down
Notes:
1. Test conditions assume signal transition times of 3 ns or less, timing reference levels of 1.5V, input pulse
levels of 0 to 3.0V and output loading specified in .igure 1.
2. Tested with the load in .igure 2. Transition is measured ±200 mV from steady-state voltage. Not 100%
tested.
3. Not 100% tested.
AC TEST CONDITIONS
Parameter
Input Pulse Level
Input Rise and .all Times
Input and Output Timing
and Reference Levels
Output Load
Unit
0V to 3.0V
3 ns
1.5V
See .igures 1 and 2
AC TEST LOADS
319
3.3V
3.3V
319
OUTPUT
30 pF
Including
jig and
scope
353
OUTPUT
5 pF
Including
jig and
scope
353
.igure 1.
4
.igure 2.
Integrated Circuit Solution Inc.
SR004-0D