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IS62LV2568LL-70TI 参数 Datasheet PDF下载

IS62LV2568LL-70TI图片预览
型号: IS62LV2568LL-70TI
PDF下载: 下载PDF文件 查看货源
内容描述: 256K ×8低功耗和低Vcc的CMOS静态RAM [256K x 8 LOW POWER and LOW Vcc CMOS STATIC RAM]
分类和应用: 存储内存集成电路静态存储器光电二极管
文件页数/大小: 10 页 / 455 K
品牌: ICSI [ INTEGRATED CIRCUIT SOLUTION INC ]
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IS62LV2568L
IS62LV2568LL
READ CYCLE SWITCHING CHARACTERISTICS
(1)
(Over Operating Range)
Symbol
Parameter
Read Cycle Time
Address Access Time
Output Hold Time
CE1
Access Time
CE2 Access Time
OE
Access Time
-55
Min. Max.
55
—
10
—
—
—
5
—
10
10
0
—
55
—
55
55
30
—
20
—
—
20
-70
Min. Max.
70
—
10
—
—
—
5
0
10
10
0
—
70
—
70
70
35
—
25
—
—
25
-100
Min. Max.
100
—
15
—
—
—
5
0
10
10
0
—
100
—
100
100
50
—
30
—
—
30
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
t
RC
t
AA
t
OHA
t
ACE
1
t
ACE
2
t
DOE
t
LZOE
(2)
OE
to Low-Z Output
t
HZOE
(2)
OE
to High-Z Output
t
LZCE
1
(2)
CE1
to Low-Z Output
t
LZCE
2
(2)
CE2 to Low-Z Output
t
HZCE
(2)
CE1
or CE2 to Low-Z Output
Notes:
1. Test conditions assume signal transition times of 5 ns or less, timing reference levels of 1.5V, input pulse levels
of 0.4V to 2.2V and output loading specified in Figure 1.
2. Tested with the load in Figure 2. Transition is measured ±500 mV from steady-state voltage. Not 100% tested.
AC TEST CONDITIONS
Parameter
Input Pulse Level
Input Rise and Fall Times
Input and Output Timing
and Reference Level
Output Load
Unit
0.4V to 2.2V
5 ns
1.5V
See Figures 1 and 2
AC TEST LOADS
1 TTL
OUTPUT
100 pF
Including
jig and
scope
OUTPUT
5 pF
Including
jig and
scope
1 TTL
Figure 1
Figure 2
Integrated Circuit Solution Inc.
SR025_0C
5