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IDT71V124SA10Y 参数 Datasheet PDF下载

IDT71V124SA10Y图片预览
型号: IDT71V124SA10Y
PDF下载: 下载PDF文件 查看货源
内容描述: 3.3V CMOS静态RAM 1兆欧( 128K ×8位)中心电源和接地引脚 [3.3V CMOS Static RAM 1 Meg (128K x 8-Bit) Center Power & Ground Pinout]
分类和应用:
文件页数/大小: 8 页 / 83 K
品牌: IDT [ INTEGRATED DEVICE TECHNOLOGY ]
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IDT71V124SA, 3.3V CMOS Static RAM
1 Meg (128K x 8-Bit) Center Power & Ground Pinout
Commercial and Industrial Temperature Ranges
AC Electrical Characteristics
(V
DD
= Min. to Max., Commercial and Industrial Temperature Ranges)
71V124SA10
Symbol
READ CYCLE
t
RC
t
AA
t
ACS
t
CLZ
(1)
t
CHZ
(1)
t
OE
t
OLZ
(1)
t
OHZ
(1)
t
OH
Read Cycle Time
Address Access Time
Chip Select Access Time
Chip Select to Output in Low-Z
Chip Deselect to Output in High-Z
Output Enable to Output Valid
Output Enable to Output in Low-Z
Output Disable to Output in High-Z
Output Hold from Address Change
10
____
____
71V124SA12
Min.
Max.
71V124SA15
Min.
Max.
71V124SA20
Min.
Max.
Unit
Parameter
Min.
Max.
12
____
____
15
____
____
20
____
____
ns
ns
ns
ns
ns
ns
ns
ns
ns
10
10
____
12
12
____
15
15
____
20
20
____
____
____
____
____
4
0
____
4
0
____
4
0
____
4
0
____
5
5
____
6
6
____
7
7
____
8
8
____
0
0
4
0
0
4
0
0
4
0
0
4
5
____
5
____
5
____
7
____
WRITE CYCLE
t
WC
t
AW
t
CW
t
AS
t
WP
t
WR
t
DW
t
DH
t
OW
(2)
t
WHZ
(2)
Write Cycle Time
Address Valid to End-of-Write
Chip Select to End-of-Write
Address Set-up Time
Write Pulse Width
Write Recovery Time
Data Valid to End-of-Write
Data Hold Time
Output Active from End-of-Write
Write Enable to Output in High-Z
10
7
7
0
7
0
5
0
3
0
____
12
8
8
0
8
0
6
0
3
0
____
15
10
10
0
10
0
7
0
3
0
____
20
12
12
0
12
0
9
0
4
0
____
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
3873 tbl 08
____
____
____
____
____
____
____
____
____
____
____
____
____
____
____
____
____
____
____
____
____
____
____
____
____
____
____
____
____
____
____
____
5
5
5
8
NOTES:
1. This parameter guaranteed with the AC load (Figure 2) by device characterization, but is not production tested.
4