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IDT71V424S12PH 参数 Datasheet PDF下载

IDT71V424S12PH图片预览
型号: IDT71V424S12PH
PDF下载: 下载PDF文件 查看货源
内容描述: 3.3V CMOS静态RAM 4 MEG ( 512K ×8位) [3.3V CMOS STATIC RAM 4 MEG (512K x 8-BIT)]
分类和应用:
文件页数/大小: 9 页 / 75 K
品牌: IDT [ INTEGRATED DEVICE TECHNOLOGY ]
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IDT71V424S, IDT71V424L, 3.3V CMOS Static RAM
4 Meg (512K x 8-bit)
Commercial and Industrial Temperature Ranges
AC Electrical Characteristics
(V
CC
= 3.3V ± 10%, Commercial and Industrial Temperature Ranges)
71V424S/L10
(2)
Symbol
READ CYCLE
t
RC
t
AA
t
ACS
t
CLZ
(1)
t
CHZ
(1)
t
OE
t
OLZ
(1)
t
OHZ
(1)
t
OH
t
PU
(1)
t
PD
(1)
WRITE CYCLE
t
WC
t
AW
t
CW
t
AS
t
WP
t
WR
t
DW
t
DH
t
OW
(1)
t
WHZ
(1)
Write Cycle Time
Address Valid to End of Write
Chip Select to End of Write
Address Set-up Time
Write Pulse Width
Write Recovery Time
Data Valid to End of Write
Data Hold Time
Output Active from End of Write
Write Enable to Output in High-Z
10
8
8
0
8
0
6
0
3
____
____
____
____
____
____
____
____
____
71V424S/L12
Min.
Max.
71V424S/L15
Min.
Max.
Unit
Parameter
Min.
Max.
Read Cycle Time
Address Access Time
Chip Select Access Time
Chip Select to Output in Low-Z
Chip Deselect to Output in High-Z
Output Enable to Output Valid
Output Enable to Output in Low-Z
Output Disable to Output in High-Z
Output Hold from Address Change
Chip Select to Power Up Time
Chip Deselect to Power Down Time
10
____
____
____
12
____
____
____
15
____
____
____
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
10
10
____
12
12
____
15
15
____
4
____
4
____
4
____
5
5
____
6
6
____
7
7
____
____
____
____
0
____
0
____
0
____
5
____
6
____
7
____
4
0
____
4
0
____
4
0
____
____
____
____
10
12
15
12
8
8
0
8
0
6
0
3
____
____
____
____
____
____
____
____
____
15
10
10
0
10
0
7
0
3
____
____
____
____
____
____
____
____
____
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
3622 tbl 10
____
____
____
6
7
7
NOTES:
1. This parameter guaranteed with the AC load (Figure 2) by device characterization, but is not production tested.
2. 0ºC to +70ºC temperature range only for low power 10ns (L10) speed grade.
6.42
5