Pin Description
Pin #
40
DIP
1
Name
44
PLCC
2
DTA
Description
Data Acknowledgement (Open Drain Output).
This is
the data acknowledgement on the microprocessor
interface. This pin is pulled low to signal that the chip
has processed the data. A 909
Ω,
1/4W, resistor is
recommended to be used as a pullup.
ST-BUS Input 0 to 2 (Inputs).
These are the inputs for
the 2048 kbit/s ST-BUS input streams.
ST-BUS Input 3 to 7 (Inputs).
These are the inputs for the 2048 kbit/s ST-BUS
input streams.
VDD
Power Input.
Positive Supply.
Framing 0-Type (Input).
This is the input for the frame
synchronization pulse for the 2048 kbit/s ST-BUS
streams. A low on this input causes the internal
counter to reset on the next negative transition of C4i
4.096 MHz Clock (Input).
ST-BUS bit cell boundaries
lie on the alternate falling edges of this clock.
Address 0 to 2 (Inputs).
These are the inputs for the
address lines on the microprocessor interface.
Address 3 to 5 (Inputs).
These are the inputs for the
address lines on the microprocessor interface.
Data Strobe (Input).
This is the input for the active
high data strobe on the microprocessor interface.
Read or Write (Input).
This is the input for the
read/write signal on the microprocessor interface
- high for read, low for write.
Chip Select (Input).
This is the input for the active low
chip select on the microprocessor interface
Data 7 to 5 (Three-state I/O Pins).
These are the
bidirectional data pins on the microprocessor interface.
Data 4 to 0 (Three-state I/O Pins).
These are the
bidirectional data pins on the microprocessor interface.
Power Input.
Negative Supply (Ground).
ST-BUS Output 7 to 3 (Three-state Outputs).
These
are the pins for the eight 2048 kbit/s ST-BUS output
streams.
ST-BUS Output 2 to 0 (Three-state Outputs).
These
are the pins for the eight 2048 kbit/s ST-BUS output
streams.
Output Drive Enable (Input).
If this input is held high,
the STo0-STo7 output drivers function normally. If this
input is low, the STo0-STo7 output drivers go into their
high impedance state. NB: Even when ODE is high,
channels on the STo0-STo7 outputs can go high
impedance under software control.
Control ST-BUS Output (Complementary Output).
Each frame of 256 bits on this ST-BUS output contains
the values of bit 1 in the 256 locations of the
Connection Memory High.
No Connection.
2
-4
5
-9
10
11
3
-5
7
-11
12
13
STi0
-STi2
STi3
-STi7
F0i
12
13
-15
16
-18
19
20
14
15
-17
19
-21
22
23
C4i
A0
-A2
A3
-A5
DS
R/W
21
22
-24
25
-29
30
31
-35
36
-38
39
24
25
-27
29
-33
34
35
-39
41
-43
44
CS
D7
-D5
D4
-D0
V
SS
STo7
-ST03
STo2
- STo0
ODE
40
1
CSTo
6,
18,
28,
40
NC
12
© IMP, Inc.
IMP8980D DS-5-00
IMP [ IMP, INC ]
