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PEB2086N 参数 Datasheet PDF下载

PEB2086N图片预览
型号: PEB2086N
PDF下载: 下载PDF文件 查看货源
内容描述: ISDN SubscribernAccess控制器 [ISDN SubscribernAccess Controller]
分类和应用: 数字传输接口电信集成电路电信电路综合业务数字网控制器
文件页数/大小: 320 页 / 1450 K
品牌: INFINEON [ Infineon ]
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Functional Description  
2.2.2  
IOM®-2 Interface Mode (ADF2:IMS=1)  
In this mode the IOM interface has the enhanced functionality of IOM-2. B-channel interfacing  
is performed directly via the IOM-2 interface and the auxiliary serial SSI and SLD interfaces  
are not longer available (as in IOM-1 mode), since they are functionally replaced by the general  
purpose IOM-2 interface.  
The Serial Port Timing Mode (SPCR:SPM) defines the operating mode of the IOM-2 interface  
i.e. either the terminal mode frame structure (3 channels) or the non-terminal frame structure  
(8 channels) can be selected (see chapter 2.4.1).  
The serial port timing mode must be set in accordance to the operating mode, i.e. the TE mode  
requires the terminal timing mode and LT-S/LT-T modes require non-terminal timing-mode.  
In NT mode the IOM frame structure is identical to that of the IOM-1 case (1 channel) and the  
non-terminal timing mode must be selected.  
The operating modes are shown in table 2.  
Table 2  
Operating Modes and Functions of Mode Specific Pins of the ISAC®-S PEB 2085/86 in  
IOM®-2 Mode  
Pin No.  
P-DIP-40  
(PEB 2085  
only)  
14 18  
11  
12  
13  
19  
15  
17  
16  
Pin No.  
P-LCC-44  
15 21  
61 6  
12  
58  
13  
59  
14  
60  
22  
7
16  
62  
20  
5
19  
Pin No.  
P-MQFP-64  
(PEB 2086  
only)  
Application  
TE  
M1 M0  
DCL  
FSC1  
FSC2  
CP  
X2  
X1  
X0  
0
0
1
1
0
1
0
1
o:1536 kHz* o:8 kHz*  
o:PU1  
i:8 kHz  
i:8 kHz  
i:8 kHz  
o:768 kHz*  
o:512 kHz*  
i:o  
o:ECHO/M**  
o:PU0  
i:CON  
i:CON  
i:o  
LT-T  
i:4096 kHz  
i:4096 kHz  
i:512 kHz  
i:8 kHz  
i:8 kHz  
i:8 kHz  
i:o  
i:o  
LT-S  
i:o  
o:7680 kHz  
i:o  
NT  
i:SCZ  
i:SSZ  
*) synchronized to the S/T interface  
i:input  
o:output  
i:o : input to be fixed at "0"  
ECHO/M The value of the M-bit is output, multiplexed with the value of the Echo-bits on the  
IOM-interface.  
Reproduces the E-bits received from the S interface synchronously to IOM frame  
"D"-bits (bit positions 24 and 25 of the IOM frame). All other bit positions, except the  
M-bit are binary "1".  
Semiconductor Group  
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