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PEB2086N 参数 Datasheet PDF下载

PEB2086N图片预览
型号: PEB2086N
PDF下载: 下载PDF文件 查看货源
内容描述: ISDN SubscribernAccess控制器 [ISDN SubscribernAccess Controller]
分类和应用: 数字传输接口电信集成电路电信电路综合业务数字网控制器
文件页数/大小: 320 页 / 1450 K
品牌: INFINEON [ INFINEON TECHNOLOGIES AG ]
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Functional Description
2.5.1
S/T Interface
According to CCITT recommendation I.430 pseudo-ternary encoding with 100% pulse width is
used on the S/T interface. A logical "1" corresponds to a neutral level (no current), whereas
logical "0" ’s are encoded as alternating positive and negative pulses. An example is shown in
figure 42.
0
+V
0V
-V
ITD00322
1
0
0
1
1
0
0
0
1
1
Figure 42
S/T Interface Line Code
One frame consists of 48 bits, at a nominal bit rate of 192 kbit/s. Thus each frame carries two
octets of B1, two octets of B2, and four D-bits, according to the B1+B2+D structure defined for
the ISDN basic access (total useful data rate: 144 kbit/s). Frame begin is marked using a code
violation (no Mark inversion). The frame structures (from network to subscriber, and subscriber
to network) are shown in
figure 43.
48 Bits in 250 µs
DL. F L.
NT
0
TE 1
0
2 Bits Offset
B1
E D A F
A
N
B2
E DM
B1
EDS
B2
E D L. F L.
D L. F L.
TE
NT
0
1
0
B1
L. D L. F
A
L.
B2
L. D L.
B1
L. D L.
B2
L. D L. F L.
t
N = Bit set to a Binary Value N = F
A
B1 = Bit within B Channel 1
B2 = Bit within B Channel 2
A = Bit used for Activation
S = Subchannel SC1 through SC5 bit position
M = Multiframing Bit
F = Framing Bit
L = DC Balancing Bit
D = D-Channel Bit
E = D-Echo-Channel Bit
F
A
= Auxiliary Framing Bit or Q-Bit
ITD02330
Figure 43
Frame Structure at Reference Points S and T (CCITT I.430)
Note:
Dots demarcate those parts of the frame that are independently DC-balanced.
Semiconductor Group
81