欢迎访问ic37.com |
会员登录 免费注册
发布采购

IA80C152JB 参数 Datasheet PDF下载

IA80C152JB图片预览
型号: IA80C152JB
PDF下载: 下载PDF文件 查看货源
内容描述: 通用通信控制器 [UNIVERSAL COMMUNICATIONS CONTROLLER]
分类和应用: 通信控制器
文件页数/大小: 32 页 / 234 K
品牌: INNOVASIC [ INNOVASIC, INC ]
 浏览型号IA80C152JB的Datasheet PDF文件第10页浏览型号IA80C152JB的Datasheet PDF文件第11页浏览型号IA80C152JB的Datasheet PDF文件第12页浏览型号IA80C152JB的Datasheet PDF文件第13页浏览型号IA80C152JB的Datasheet PDF文件第15页浏览型号IA80C152JB的Datasheet PDF文件第16页浏览型号IA80C152JB的Datasheet PDF文件第17页浏览型号IA80C152JB的Datasheet PDF文件第18页  
Page 14 of 32  
IA80C152  
Preliminary Data Sheet  
UNIVERSAL COMMUNICATIONS CONTROLLER  
IDA - If IDA is set to 1 then the destination address is automatically incremented after the transfer of each byte.  
DAS  
IDA  
Destination  
Auto-Increment  
0
0
1
1
0
1
0
1
External Ram  
External Ram  
SFR  
NO  
YES  
NO  
YES  
Internal RAM  
SAS - This bit in conjunction with ISA determine the source address space.  
ISA - If ISA is set to 1 then the source address is automatically incremented after the transfer of each byte.  
SAS  
ISA  
0
1
0
1
Source  
External Ram  
External Ram  
SFR  
Auto-Increment  
0
0
1
1
NO  
YES  
NO  
YES  
Internal RAM  
DM - If this bit is set to a 1 then the DMA channel operates in demand mode. In this mode the DMA is initiated by  
either an external signal or by a serial port flag depending on the value of the TM bit. If the DM bit is set to a 0 then  
DMA is initiated by setting the GO bit.  
TM - If DM is 1 then TM selects if DMA is initiated by an external signal (TM=1) or by a serial port bit (TM=0). If  
DM is 0 then TM selects whether DMA transfers are in burst mode (TM=1) or in alternate cycles mode (TM=0).  
DM  
0
TM  
0
Mode  
Alternate Cycles  
0
1
Burst  
1
1
0
1
Serial Port Demand  
External Demand  
DONE - This bit indicates that the DMA operation has completed. It also causes an interrupt. This bit is set to 1  
when BCRn equals 0 and is set to 0 when the interrupt is vectored to. The user can also set and clear this bit.  
GO - If this bit is set to 1 it enables the DMA channel.  
DPL, DPH (082h, 083h) - DPTR, or the "data pointer" consists of the two 8-bit registers, DPL and DPH. The DPTR  
must be used for accesses to external memory requiring 16-bit addresses.  
GMOD (084h) - An 8-bit register that controls the GSC Modes as described below.  
7
6
5
4
3
2
1
0
XTCLK  
M1  
M0  
AL  
CT  
PL1  
PL0  
PR  
PR - If set to a 1 the GSC is in SDLC mode. If set to a 0 the GSC is in CSMA/CD mode.  
PL0,1 - Preamble length:  
PL1  
PL0  
Preamble length in bits  
0
0
1
1
0
1
0
1
0
8
32  
64  
The length noted in the table includes the two bit BOF in CSMA/CD mode but not the SDLC flag. Zero length  
preamble is not compatible with CSMA/CD mode.  
CT - This bit determines the CRC type used. If set to a 1 the 32 bit AUTODIN II-32 is used. If set to a 0 the 16 bit  
Copyright ã 2000  
innovASIC  
[_________The End of Obsolescenceä