IA8044/IA8344
Data Sheet
SDLC Communications Controller
March 30, 2010
4.3.4 Bit Addressable Memory
Both the internal RAM and the SFRs have locations that are bit addressable in addition to the byte
addressable locations (see Tables 7 and 8).
Table 7. SFR Bit Addressable Locations
Byte Address Bit [7] Bit [6] Bit [5] Bit [4] Bit [3] Bit [2] Bit [1] Bit [0] Register
F0h
E0h
D8h
D0h
C8h
B8h
B0h
A8h
A0h
90h
88h
80h
F7h
E7h
DFh
D7h
CFh
–
B7h
AFh
A7h
97h
8Fh
87h
F6h
E6h
DEh
D6h
CEh
–
B6h
–
A6h
96h
8Eh
86h
F5h
E5h
DDh
D5h
CDh
–
B5h
–
A5h
95h
8Dh
85h
F4h
E4h
DCh
D4h
CCh
BCh
B4h
ACh
A4h
94h
8Ch
84h
F3h
E3h
DBh
D3h
CBh
BBh
B3h
ABh
A3h
93h
8Bh
83h
F2h
E2h
DAh
D2h
CAh
BAh
B2h
AAh
A2h
92h
8Ah
82h
F1h
E1h
D9h
D1h
C9h
B9h
B1h
A9h
A1h
91h
89h
81h
F0h
E0h
D8h
D0h
C8h
B8h
B0h
A8h
A0h
90h
88h
80h
B
ACC
NSNR
PSW
STS
IP
P3
IE
P2
P1
TCON
P0
Table 8. Internal RAM Bit Addressable Locations
Byte Address Bit [7] Bit [6] Bit [5] Bit [4] Bit [3] Bit [2] Bit [1] Bit [0]
30h-BFh
2Fh
2Eh
2Dh
2Ch
2Bh
2Ah
29h
28h
27h
26h
25h
24h
23h
22h
21h
20h
Upper Internal RAM Locations
7Fh
77h
6Fh
67h
5Fh
57h
4Fh
47h
3Fh
37h
2Fh
27h
1Fh
17h
0Fh
07h
7Eh
76h
6Eh
66h
5Eh
56h
4Eh
46h
3Eh
36h
2Eh
26h
1Eh
16h
0Eh
06h
7Dh
75h
6Dh
65h
5Dh
55h
4Dh
45h
3Dh
35h
2Dh
25h
1Dh
15h
0Dh
05h
7Ch
74h
6Ch
64h
5Ch
54h
4Ch
44h
3Ch
34h
2Ch
24h
1Ch
14h
0Ch
04h
7Bh
73h
6Bh
63h
5Bh
53h
4Bh
43h
3Bh
33h
2Bh
23h
1Bh
13h
0Bh
03h
7Ah
72h
6Ah
62h
5Ah
52h
4Ah
42h
3Ah
32h
2Ah
22h
1Ah
12h
0Ah
02h
79h
71h
69h
61h
59h
51h
49h
41h
39h
31h
29h
21h
19h
11h
09h
01h
78h
70h
68h
60h
58h
50h
48h
40h
38h
30h
28h
20h
18h
10h
08h
00h
18h-1Fh
10h-17h
08h-0Fh
00h-07h
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