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E28F020-120 参数 Datasheet PDF下载

E28F020-120图片预览
型号: E28F020-120
PDF下载: 下载PDF文件 查看货源
内容描述: 28F020 2048K ( 256K ×8 )的CMOS FLASH MEMORY [28F020 2048K (256K X 8) CMOS FLASH MEMORY]
分类和应用: 闪存存储内存集成电路光电二极管
文件页数/大小: 38 页 / 877 K
品牌: INTEL [ INTEL CORPORATION ]
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E
Start Erasure
(4)
Bus
Operation
Command
Y
Data = 00H?
N
Program All
Bytes to 00H
Apply V
PPH (1)
ADDR = 00H
PLSCNT = 0
Write Erase
Set-Up Cmd
Write Erase Cmd
Time Out 10 ms
Set-Up
Erase
Erase
Standby
Write
Write
Stand-by
Erase
(2)
Verify
Data = 20H
Data = 20H
28F020
Comments
Entire Memory Must = 00H
Before Erasure
Use Quick-Pulse
Programming Algorithm
(Figure 4)
Wait for V
PP
Ramp to V
PPH
(1)
Initialize Addresses and
Pulse-Count
Duration of Erase Operation
(t
WHWH2
)
Addr = Byte to Verify;
Data = A0H; Stops Erase
Operation
(3)
t
WHGL
Read Byte to Verify Erasure
Write Erase
Verify Cmd
Time Out 6 µs
Read Data
from Device
N
N
Data = FFH?
Y
N
Increment Addr
Last Address?
Y
Write Read Cmd
Inc
PLSCNT =
1000?
Y
Write
Standby
Read
Standby
Compare Output to FFH
Increment Pulse-Count
Write
Read
Data = 00H, Resets the
Register for Read Operations
Standby
Apply V
PPL (1)
Erasure
Completed
Apply V
PPL (1)
Wait for V
PP
Ramp to V
PPL (1)
Erase Error
0245_05
NOTES:
1. See
DC Characteristics
for the value of V
PPH
and V
PPL
.
2. Erase Verify is performed only after chip-erasure. A final read/compare may be performed (optional) after the register is
written with the Read command.
3. Refer of
Principles of Operation.
4.
Caution:
The algorithm
must be followed
to ensure proper and reliable operation of the device.
Figure 5. 28F020 Quick-Erase Algorithm
15