E
Command
Read Memory
Read Intelligent
Identifier Codes
(4)
Set-Up
Erase/Erase
(5)
Erase Verify
(5)
Set-Up Program/
Program
(6)
Program Verify
(6)
Reset
(7)
Bus
Cycles
Req’d
1
3
2
2
2
2
2
28F010
Table 3. Command Definitions
First Bus Cycle
Second Bus Cycle
Operation
(1)
Address
(2)
Write
Write
Write
Write
Write
Write
Write
X
IA
X
EA
X
X
X
Data
(3)
00H
90H
20H
A0H
40H
C0H
FFH
Operation
(1)
Address
(2)
Data
(3)
Read
Write
Read
Write
Read
Write
IA
X
X
PA
X
X
ID
20H
EVD
PD
PVD
FFH
NOTES:
1. Bus operations are defined in Table 2.
2. IA = Identifier address: 00H for manufacturer code, 01H for device code.
EA = Erase Address: Address of memory location to be read during erase verify.
PA = Program Address: Address of memory location to be programmed.
Addresses are latched on the falling edge of the WE# pulse.
3. ID = Identifier Data: Data read from location IA during device identification (Mfr = 89H, Device = B4H).
EVD = Erase Verify Data: Data read from location EA during erase verify.
PD = Program Data: Data to be programmed at location PA. Data is latched on the rising edge of WE#.
PVD = Program Verify Data: Data read from location PA during program verify. PA is latched on the Program command.
4. Following the Read Intelligent ID command, two read operations access manufacturer and device codes.
5. Figure 5 illustrates the
28F010 Quick-Erase Algorithm
flowchart.
6. Figure 4 illustrates the
28F010 Quick-Pulse Programming Algorithm
flowchart.
7. The second bus cycle must be followed by the desired command register write.
2.2.2.1
Read Command
2.2.2.2
Intelligent Identifier Command
While V
PP
is high, for erasure and programming,
memory contents can be accessed via the Read
command. The read operation is initiated by writing
00H into the command register. Microprocessor
read cycles retrieve array data. The device remains
enabled for reads until the command register
contents are altered.
The default contents of the register upon V
PP
power-up is 00H. This default value ensures that no
spurious alteration of memory contents occurs
during the V
PP
power transition. Where the V
PP
supply is hardwired to the 28F010, the device
powers-up and remains enabled for reads until the
command register contents are changed. Refer to
the
AC Characteristics—Read-Only Operations
and
waveforms for specific timing parameters.
Flash memories are intended for use in applications
where the local CPU alters memory contents. As
such, manufacturer and device codes must be
accessible while the device resides in the target
system. PROM programmers typically access
signature codes by raising A
9
to a high voltage.
However, multiplexing high voltage onto address
lines is not a desired system design practice.
The 28F010 contains an intelligent identifier
operation to supplement traditional PROM-
programming methodology. The operation is
initiated by writing 90H into the command register.
Following the command Write, a read cycle from
address 0000H retrieves the manufacturer code of
89H. A read cycle from address 0001H returns the
device code of B4H. To terminate the operation, it
11
INTEL [ INTEL CORPORATION ]
