28F640L30, 28F128L30, 28F256L30
3.3
Command Definitions
Valid device command codes and descriptions are shown in
Table 6.
Mode
Command Codes and Definitions (Sheet 1 of 2)
Description
Places the addressed partition in Read Array mode. Array data is output on D[15:0].
Places the addressed partition in Read Status Register mode. The partition enters this mode
after a program or erase command is issued. Status Register data is output on D[7:0].
Places the addressed partition in Read Device Identifier mode. Subsequent reads from
addresses within the partition outputs manufacturer/device codes, Configuration Register data,
Block Lock status, or Protection Register data on D[15:0].
Code Device Mode
0xFF Read Array
Read Status
0x70
Register
Read Device
ID or
0x90
Configuration
Register
0x98 Read Query
0x50
Read
0x40
0x10
Write
0xE8
0xD0
0x80
0xD0
0x20
Erase
0xD0
0xB0
Suspend
0xD0
Places the addressed partition in Read Query mode. Subsequent reads from the partition
addresses output Common Flash Interface information on D[7:0].
Clear Status The WSM can only set Status Register error bits. The Clear Status Register command is used
Register
to clear the SR error bits.
First cycle of a 2-cycle programming command; prepares the CUI for a write operation. On the
next write cycle, the address and data are latched and the WSM executes the programming
algorithm at the addressed location. During program operations, the partition responds only to
Word Program
Read Status Register and Program Suspend commands. CE# or OE# must be toggled to
Setup
update the Status Register in asynchronous read. CE# or ADV# must be toggled to update the
Status Register Data for synchronous Non-array read. The Read Array command must be
issued to read array data after programming has finished.
Alternate Word
Program
Equivalent to the Word Program Setup command, 0x40.
Setup
Buffered
This command loads a variable number of bytes up to the buffer size of 32 words onto the
Program
program buffer.
Buffered
The confirm command is Issued after the data streaming for writing into the buffer is done. This
Program
instructs the WSM to perform the Buffered Program algorithm, writing the data from the buffer
Confirm
to the flash memory array.
Buffered
First cycle of a 2-cycle command; initiates Buffered Enhanced Factory Program mode
Enhanced
(Buffered EFP). The CUI then waits for the Buffered EFP Confirm command, 0xD0, that
Factory
initiates the Buffered EFP algorithm. All other commands are ignored when Buffered EFP mode
Programming
begins.
Setup
Buffered EFP If the previous command was Buffered EFP Setup (0x80), the CUI latches the address and
Confirm
data, and prepares the device for Buffered EFP mode.
First cycle of a 2-cycle command; prepares the CUI for a block-erase operation. The WSM
Block Erase
performs the erase algorithm on the block addressed by the Erase Confirm command. If the
Setup
next command
is not
the Erase Confirm (0xD0) command, the CUI sets Status Register bits
SR[4] and SR[5], and places the addressed partition in read status register mode.
If the first command was Block Erase Setup (0x20), the CUI latches the address and data, and
the WSM erases the addressed block. During block-erase operations, the partition responds
Block Erase
only to Read Status Register and Erase Suspend commands. CE# or OE# must be toggled to
Confirm
update the Status Register in asynchronous read. CE# or ADV# must be toggled to update the
Status Register Data for synchronous Non-array read.
This command issued to any device address initiates a suspend of the currently-executing
Program or
program or block erase operation. The Status Register indicates successful suspend operation
Erase
by setting either SR[2] (program suspended) or SR[6] (erase suspended), along with SR[7]
Suspend
(ready). The Write State Machine remains in the suspend mode regardless of control signal
states (except for RST# asserted).
Suspend
This command issued to any device address resumes the suspended program or block-erase
Resume
operation.
20
Datasheet
INTEL [ INTEL CORPORATION ]
